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From Thierry Moreau <notificati...@github.com>
Subject Re: [dmlc/tvm] [RFC] [VTA] [TSIM] Enabling Cycle-Accurate Hardware Simulation for VTA (#3009)
Date Thu, 11 Apr 2019 23:48:59 GMT
This will facilitate continuous testing of novel VTA features, and invite more contribution
to modify the VTA spec in the future. Cycle-accurate testing from high-level test scripts
in Python is definitely the way forward for all of TVM's backend.

@kazum @ktabata it would be great to get your take on this since you took part in providing
the SDAccel and AOCL support respectively in TVM. Having your take on this verilator-based
simulation flow would be great.

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