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From tqc...@apache.org
Subject [incubator-tvm] branch master updated (5786e82 -> eb66fd9)
Date Sat, 27 Jun 2020 17:54:40 GMT
This is an automated email from the ASF dual-hosted git repository.

tqchen pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-tvm.git.


    from 5786e82  add dnnl (#5936)
     add eb66fd9  [TIR][OP][API-CHANGE] Remove CallNode.call_type in favor of attribute. (#5937)

No new revisions were added by this update.

Summary of changes:
 include/tvm/tir/builtin.h                          |  34 ++++-
 include/tvm/tir/expr.h                             |  28 +---
 include/tvm/tir/op.h                               |  16 +--
 include/tvm/tir/op_attr_types.h                    |  37 +++++
 python/tvm/te/hybrid/calls.py                      |   4 +-
 python/tvm/tir/__init__.py                         |   8 +-
 python/tvm/tir/expr.py                             |  39 +++--
 python/tvm/tir/ir_builder.py                       |   3 +-
 python/tvm/tir/op.py                               | 127 ++++++++--------
 src/arith/ir_mutator_with_analyzer.cc              |   2 +-
 src/arith/pattern_match.h                          |  26 ++--
 src/contrib/hybrid/codegen_hybrid.cc               |   3 +-
 src/printer/tir_text_printer.cc                    |  20 +--
 src/target/intrin_rule.cc                          |  50 +++----
 src/target/intrin_rule.h                           |   4 +-
 src/target/llvm/codegen_arm.cc                     |  15 +-
 src/target/llvm/codegen_llvm.cc                    |   4 +-
 src/target/llvm/codegen_llvm.h                     |   3 +
 src/target/llvm/codegen_x86_64.cc                  |  11 +-
 src/target/llvm/intrin_rule_llvm.h                 |   5 +-
 src/target/llvm/intrin_rule_nvptx.cc               |  48 +++----
 src/target/llvm/intrin_rule_rocm.cc                |  61 ++++----
 src/target/source/codegen_c.cc                     |   2 +-
 src/target/source/codegen_c.h                      |   1 +
 src/target/source/intrin_rule_aocl.cc              |  44 +++---
 src/target/source/intrin_rule_cuda.cc              |  55 +++----
 src/target/source/intrin_rule_metal.cc             |  40 +++---
 src/target/source/intrin_rule_opencl.cc            |  42 +++---
 src/target/source/intrin_rule_vhls.cc              |  38 ++---
 src/target/spirv/codegen_spirv.cc                  |  10 +-
 src/target/spirv/intrin_rule_spirv.cc              |   3 +-
 src/te/autodiff/jacobian.cc                        |  52 ++++---
 src/te/operation/compute_op.cc                     |   7 +-
 src/te/operation/cross_thread_reduction.cc         |   4 +-
 src/te/operation/extern_op.cc                      |   2 +-
 src/te/operation/tensor_compute_op.cc              |  12 +-
 src/te/operation/tensorize.cc                      |  12 +-
 .../schedule_postproc_rewrite_for_tensor_core.cc   |  23 ++-
 src/tir/analysis/side_effect.cc                    |  16 ++-
 src/tir/ir/buffer.cc                               |   2 +-
 src/tir/ir/expr.cc                                 |   7 +-
 src/tir/ir/expr_functor.cc                         |   2 +-
 src/tir/ir/stmt.cc                                 |   6 +-
 src/tir/op/builtin.cc                              | 160 +++++++++++++++------
 src/tir/op/op.cc                                   |  60 ++++----
 src/tir/op/runtime.cc                              |   6 +-
 src/tir/transforms/arg_binder.cc                   |   3 +-
 src/tir/transforms/bf16_legalize.cc                |   4 +-
 src/tir/transforms/coproc_sync.cc                  |  12 +-
 src/tir/transforms/inject_virtual_thread.cc        |   3 +-
 src/tir/transforms/ir_util.h                       |   9 +-
 src/tir/transforms/lower_intrin.cc                 |  20 ++-
 src/tir/transforms/lower_thread_allreduce.cc       |   8 +-
 src/tir/transforms/lower_tvm_builtin.cc            |  20 +--
 src/tir/transforms/lower_warp_memory.cc            |   5 +-
 src/tir/transforms/make_packed_api.cc              |   5 +-
 src/tir/transforms/rewrite_unsafe_select.cc        |  18 ++-
 src/tir/transforms/split_host_device.cc            |   3 +-
 src/tir/transforms/storage_flatten.cc              |   6 +-
 src/tir/transforms/storage_rewrite.cc              |   3 +-
 src/tir/transforms/thread_storage_sync.cc          |  11 +-
 src/tir/transforms/vectorize_loop.cc               |   6 +-
 tests/cpp/ir_functor_test.cc                       |   4 +-
 .../unittest/test_arith_canonical_simplify.py      |   2 +-
 .../python/unittest/test_target_codegen_c_host.py  |   2 +-
 tests/python/unittest/test_target_codegen_llvm.py  |   8 +-
 tests/python/unittest/test_tir_constructor.py      |   3 +-
 tests/python/unittest/test_tir_nodes.py            |  26 ++--
 .../unittest/test_tir_transform_bf16_legalize.py   |  12 +-
 .../test_tir_transform_combine_context_call.py     |   2 +-
 .../test_tir_transform_inject_virtual_thread.py    |   2 +-
 topi/include/topi/detail/extern.h                  |  14 +-
 topi/include/topi/elemwise.h                       |   3 +-
 topi/python/topi/arm_cpu/bitserial_conv2d.py       |  28 ++--
 topi/python/topi/arm_cpu/tensor_intrin.py          |  13 +-
 topi/python/topi/cuda/nms.py                       |   6 +-
 topi/python/topi/cuda/rcnn/proposal.py             |   6 +-
 topi/python/topi/cuda/sort.py                      |   9 +-
 topi/python/topi/x86/tensor_intrin.py              |  70 ++++-----
 tutorials/language/intrin_math.py                  |   4 +-
 vta/python/vta/environment.py                      |  12 +-
 vta/python/vta/transform.py                        |   2 +-
 82 files changed, 800 insertions(+), 718 deletions(-)


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