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From tqc...@apache.org
Subject [incubator-tvm] branch master updated (8607947 -> 841725c)
Date Fri, 20 Mar 2020 04:02:57 GMT
This is an automated email from the ASF dual-hosted git repository.

tqchen pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-tvm.git.


    from 8607947  [Torch] Add initial 3D op support and test on Resnet 3D (#5075)
     add 841725c  [TIR][TARGET] Refactor Target codegen to use IRModule and PrimFunc. (#5107)

No new revisions were added by this update.

Summary of changes:
 include/tvm/ir/expr.h                      |  12 +++
 include/tvm/ir/function.h                  |  21 +++++
 include/tvm/ir/type.h                      |  56 +++++++++++-
 include/tvm/tir/expr.h                     |  47 +++++-----
 include/tvm/tir/function.h                 |  10 +++
 include/tvm/tir/ir_pass.h                  |  14 +++
 include/tvm/tir/op.h                       |  13 +++
 python/tvm/ir/__init__.py                  |   2 +-
 python/tvm/ir/json_compact.py              |  11 +++
 python/tvm/ir/type.py                      |  15 ++++
 python/tvm/tir/expr.py                     |   6 +-
 src/arith/domain_touched.cc                |   2 +-
 src/arith/ir_mutator_with_analyzer.cc      |   4 +-
 src/driver/driver_api.cc                   |   2 +-
 src/ir/type.cc                             |  21 +++++
 src/runtime/module.cc                      |   2 +-
 src/target/build_common.h                  |  28 ++++++
 src/target/codegen.cc                      |  75 ++++++++++++++--
 src/target/llvm/codegen_amdgpu.cc          |  26 +++---
 src/target/llvm/codegen_cpu.cc             |  16 ++--
 src/target/llvm/codegen_cpu.h              |   2 +-
 src/target/llvm/codegen_llvm.cc            | 137 +++++++++++++++++------------
 src/target/llvm/codegen_llvm.h             |  38 ++++++--
 src/target/llvm/codegen_nvptx.cc           |  24 +++--
 src/target/llvm/codegen_x86_64.cc          |   5 +-
 src/target/llvm/llvm_module.cc             |  47 +++++++---
 src/target/opt/build_cuda_on.cc            |  16 +++-
 src/target/source/codegen_aocl.cc          |  20 +++--
 src/target/source/codegen_c.cc             |  66 ++++++++++----
 src/target/source/codegen_c.h              |  38 ++++++--
 src/target/source/codegen_c_host.cc        |  70 ++++-----------
 src/target/source/codegen_c_host.h         |   4 +-
 src/target/source/codegen_cuda.cc          |  10 +--
 src/target/source/codegen_cuda.h           |   2 +-
 src/target/source/codegen_metal.cc         |  71 +++++++++------
 src/target/source/codegen_metal.h          |   7 +-
 src/target/source/codegen_opencl.cc        |  54 ++++--------
 src/target/source/codegen_opencl.h         |   7 +-
 src/target/source/codegen_opengl.cc        |  43 ++++++---
 src/target/source/codegen_opengl.h         |   4 +-
 src/target/source/codegen_vhls.cc          |  41 ++++++---
 src/target/source/codegen_vhls.h           |  11 +--
 src/target/spirv/build_vulkan.cc           |  26 ++++--
 src/target/spirv/codegen_spirv.cc          |  23 +++--
 src/target/spirv/codegen_spirv.h           |   2 +-
 src/target/stackvm/codegen_stackvm.cc      |  38 +++++---
 src/target/stackvm/codegen_stackvm.h       |   2 +-
 src/te/operation/cross_thread_reduction.cc |   4 +-
 src/te/operation/extern_op.cc              |   5 +-
 src/te/operation/hybrid_op.cc              |   3 +-
 src/te/operation/op_util.cc                |   2 +-
 src/te/operation/scan_op.cc                |   4 +-
 src/te/schedule/schedule_ops.cc            |  14 +--
 src/tir/ir/expr.cc                         |  50 ++++++++---
 src/tir/ir/lowered_func.cc                 |   2 +
 src/tir/ir/op.cc                           |  24 ++++-
 src/tir/pass/simple_passes.cc              |  26 ++++++
 src/tir/pass/storage_rewrite.cc            |  41 +++++++++
 tests/python/relay/test_ir_text_printer.py |   4 +-
 tests/python/relay/test_json_compact.py    |  24 +++++
 tests/python/unittest/test_tir_nodes.py    |  11 +++
 61 files changed, 997 insertions(+), 408 deletions(-)


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