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From GitBox <...@apache.org>
Subject [GitHub] [incubator-tvm] yzhliu commented on a change in pull request #5092: [PASS] dtype rewrite for indexing variables
Date Thu, 19 Mar 2020 06:23:30 GMT
yzhliu commented on a change in pull request #5092: [PASS] dtype rewrite for indexing variables
URL: https://github.com/apache/incubator-tvm/pull/5092#discussion_r394803334
 
 

 ##########
 File path: src/tir/pass/rewrite_datatype.cc
 ##########
 @@ -0,0 +1,322 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+
+/*!
+ * \file rewrite_datatype.cc
+ */
+
+#include <tvm/tir/ir_pass.h>
+#include <tvm/tir/op.h>
+#include "../../arith/ir_mutator_with_analyzer.h"
+#include "../../arith/ir_visitor_with_analyzer.h"
+
+namespace tvm {
+namespace tir {
+
+using arith::Analyzer;
+using arith::IRMutatorWithAnalyzer;
+using arith::ConstIntBound;
+
+class DataTypeRewriter;
+
+class DataTypeVisitor final : public StmtExprVisitor {
+ public:
+  void VisitExpr(const PrimExpr& e) {
+    if (e.dtype().is_int()) {
+      int bits = 64;
+      if (e.dtype().bits() <= 32 ||
+          analyzer_.CanProve(e <= max_value(DataType::Int(32)) &&
+                             e >= min_value(DataType::Int(32)))) {
+        bits = 32;
+      }
+      int tmp = bits_;
+      bits_ = bits > bits_ ? bits :  bits_;
+      StmtExprVisitor::VisitExpr(e);
+      bits_ = tmp;
+    } else {
+      StmtExprVisitor::VisitExpr(e);
+    }
+  }
+
+  void VisitStmt_(const ForNode* op) {
+    analyzer_.Bind(op->loop_var,
+                   Range::make_by_min_extent(op->min, op->extent));
+    vset_.insert(op->loop_var.as<Object>());
+    vextent_[op->loop_var.as<Object>()] = op->extent.dtype();
+    return StmtExprVisitor::VisitStmt_(op);
+  }
+
+  void VisitStmt_(const AttrStmtNode* op) {
+    if (op->attr_key == attr::thread_extent ||
+        op->attr_key == attr::virtual_thread) {
+      IterVar iv = Downcast<IterVar>(op->node);
+      CHECK_NE(iv->thread_tag.length(), 0U);
+      analyzer_.Bind(iv->var,
+                      Range::make_by_min_extent(0, op->value));
+      vset_.insert(iv->var.as<Object>());
+      vextent_[iv->var.as<Object>()] = op->value.dtype();
+      StmtExprVisitor::VisitStmt_(op);
+    } else {
+      StmtExprVisitor::VisitStmt_(op);
+    }
+  }
+
+  void VisitExpr_(const ReduceNode* op) {
+    // Setup the domain information before simplification.
+    for (const IterVar& iv : op->axis) {
+      analyzer_.Bind(iv->var, iv->dom);
+      vset_.insert(iv->var.as<Object>());
+      vextent_[iv->var.as<Object>()] = iv->dom->extent.dtype();
+    }
+    // Recursively call simplification when necessary.
+    StmtExprVisitor::VisitExpr_(op);
+  }
+
+  void VisitExpr_(const VarNode* op) {
+    if (vset_.find(op) != vset_.end()) {
+      int bits = std::min(vextent_[op].bits(), bits_);
+      if (vmap.find(op) == vmap.end()) {
+        vmap[op] = op->dtype.with_bits(bits);
+      } else {
+        vmap[op] = op->dtype.with_bits(std::max(vmap[op].bits(), bits));
+      }
+    }
+    StmtExprVisitor::VisitExpr_(op);
+  }
+
+  void VisitExpr_(const IntImmNode* op) {
+    if (op->dtype.is_int()) {
+      int bits = std::min(op->dtype.bits(), bits_);
+      if (vmap.find(op) == vmap.end()) {
+        vmap[op] = op->dtype.with_bits(bits);
+      } else {
+        vmap[op] = op->dtype.with_bits(std::max(vmap[op].bits(), bits));
+      }
+    }
+    StmtExprVisitor::VisitExpr_(op);
+  }
+
+  void VisitExpr_(const CastNode* op) {
+    if (op->dtype.is_int()) {
+      int bits = std::min(op->dtype.bits(), bits_);
+      if (vmap.find(op) == vmap.end()) {
+        vmap[op] = op->dtype.with_bits(bits);
+      } else {
+        vmap[op] = op->dtype.with_bits(std::max(vmap[op].bits(), bits));
+      }
+    }
+    StmtExprVisitor::VisitExpr_(op);
+  }
+
+  // the narrowed datatype of Var and IntImm
+  std::unordered_map<const Object*, DataType> vmap;
+
+ protected:
+  // internal analyzer
+  arith::Analyzer analyzer_;
+
+ private:
+  // the maximum bits of all containing expressions
+  int bits_;
+  // the vars to be rewritten
+  std::unordered_set<const Object*> vset_;
 
 Review comment:
   is it necessary? can we simply check `vextent_`?

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