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From "Matthias Boehm (JIRA)" <j...@apache.org>
Subject [jira] [Created] (SYSTEMML-1662) Extended HOP DAG validator
Date Sat, 03 Jun 2017 22:08:04 GMT
Matthias Boehm created SYSTEMML-1662:
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             Summary: Extended HOP DAG validator
                 Key: SYSTEMML-1662
                 URL: https://issues.apache.org/jira/browse/SYSTEMML-1662
             Project: SystemML
          Issue Type: Sub-task
            Reporter: Matthias Boehm


This task aims to extend the existing HOP DAG validator (see {{org.apache.sysml.hops.rewrite.HopDagValidator}},
which can be enabled via {{org.apache.sysml.hops.rewriteProgramRewriter.CHECK}}) in various
ways in order to provide better developer tooling for checking the correctness of new and
existing rewrites.

So far, this validator, checks only for 
* Correct parent node linking
* Correct child node linking
* Non-empty children (for all hops other than {{DataOp}} and {{LiteralOp}})






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