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From w...@apache.org
Subject parquet-cpp git commit: PARQUET-862: Provide defaut cache size values
Date Sat, 04 Feb 2017 23:29:11 GMT
Repository: parquet-cpp
Updated Branches:
  refs/heads/master 782049bac -> ac58edac7


PARQUET-862: Provide defaut cache size values

This patch allows to port parquet-cpp on non-intel architectures
and/or linux/unix flavors where CPU info is different or not
available. Tested on Alpinelinux (musl libc).

Author: Marc Vertes <mvertes@free.fr>

Closes #234 from mvertes/master and squashes the following commits:

1b087be [Marc Vertes] PARQUET-862: Provide defaut cache size values


Project: http://git-wip-us.apache.org/repos/asf/parquet-cpp/repo
Commit: http://git-wip-us.apache.org/repos/asf/parquet-cpp/commit/ac58edac
Tree: http://git-wip-us.apache.org/repos/asf/parquet-cpp/tree/ac58edac
Diff: http://git-wip-us.apache.org/repos/asf/parquet-cpp/diff/ac58edac

Branch: refs/heads/master
Commit: ac58edac7ccb9b4b867c3729d1ff31621b73e957
Parents: 782049b
Author: Marc Vertes <mvertes@free.fr>
Authored: Sat Feb 4 18:29:04 2017 -0500
Committer: Wes McKinney <wes.mckinney@twosigma.com>
Committed: Sat Feb 4 18:29:04 2017 -0500

----------------------------------------------------------------------
 src/parquet/util/cpu-info.cc | 7 +++++++
 1 file changed, 7 insertions(+)
----------------------------------------------------------------------


http://git-wip-us.apache.org/repos/asf/parquet-cpp/blob/ac58edac/src/parquet/util/cpu-info.cc
----------------------------------------------------------------------
diff --git a/src/parquet/util/cpu-info.cc b/src/parquet/util/cpu-info.cc
index f56d423..dd31a31 100644
--- a/src/parquet/util/cpu-info.cc
+++ b/src/parquet/util/cpu-info.cc
@@ -130,11 +130,18 @@ void CpuInfo::Init() {
     cache_sizes_[i] = data[i];
   }
 #else
+#ifndef _SC_LEVEL1_DCACHE_SIZE
+  // Provide reasonable default values if no info
+  cache_sizes_[0] = 32 * 1024;   // Level 1: 32k
+  cache_sizes_[1] = 256 * 1024;  // Level 2: 256k
+  cache_sizes_[2] = 3072 * 1024; // Level 3: 3M
+#else
   // Call sysconf to query for the cache sizes
   cache_sizes_[0] = sysconf(_SC_LEVEL1_DCACHE_SIZE);
   cache_sizes_[1] = sysconf(_SC_LEVEL2_CACHE_SIZE);
   cache_sizes_[2] = sysconf(_SC_LEVEL3_CACHE_SIZE);
 #endif
+#endif
 
   if (max_mhz != 0) {
     cycles_per_ms_ = max_mhz * 1000;


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