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From Matthias Seidel <matthias.sei...@hamburg.de>
Subject Re: 4.1.8-RC1 DOA (Was: Fwd: [openoffice] branch AOO418 updated: Fix broken compile for older Linux... disable HW accel just as we used to do before)
Date Tue, 06 Oct 2020 20:15:38 GMT
Hi Jim,

Am 06.10.20 um 21:50 schrieb Jim Jagielski:
> Because of this break for Linux, we needed to update the patch file for nss, which means
a new Git rev.
>
> this means we need to bump from m1 -> m2 (et.al.) and thus create a new tag AOO418-RC2.
I'll start work on that...

OK, let me know if I can help and when you start the new RC.

Regards,

   Matthias

>
>> Begin forwarded message:
>>
>> This is an automated email from the ASF dual-hosted git repository.
>>
>> jim pushed a commit to branch AOO418
>> in repository https://gitbox.apache.org/repos/asf/openoffice.git
>>
>>
>> The following commit(s) were added to refs/heads/AOO418 by this push:
>>     new 0a99449  Fix broken compile for older Linux... disable HW accel just as we
used to do before
>> 0a99449 is described below
>>
>> commit 0a994498bd0b70dfacbfd49f6470cce09e547165
>> Author: Jim Jagielski <jimjag@gmail.com>
>> AuthorDate: Tue Oct 6 15:42:08 2020 -0400
>>
>>    Fix broken compile for older Linux... disable HW accel just as we used to do before
>> ---
>> main/nss/nss_linux.patch | 15 +++++++++++++++
>> 1 file changed, 15 insertions(+)
>>
>> diff --git a/main/nss/nss_linux.patch b/main/nss/nss_linux.patch
>> index 9d768b2..50c27a4 100644
>> --- a/main/nss/nss_linux.patch
>> +++ b/main/nss/nss_linux.patch
>> @@ -12,3 +12,18 @@ diff -ur misc/nss-3.25/nss/lib/freebl/Makefile misc/build/nss-3.25/nss/lib/freeb
>>  	EXTRA_SRCS += intel-gcm-wrap.c
>>  	ifeq ($(CLANG_CL),1)
>>  	    INTEL_GCM_CLANG_CL = 1
>> +@@ -221,10 +221,10 @@
>> +     DEFINES += -DMP_IS_LITTLE_ENDIAN
>> + #   DEFINES += -DMPI_AMD64_ADD
>> +     # comment the next four lines to turn off Intel HW acceleration.
>> +-    DEFINES += -DUSE_HW_AES -DINTEL_GCM
>> +-    ASFILES += intel-aes.s intel-gcm.s
>> +-    EXTRA_SRCS += intel-gcm-wrap.c
>> +-    INTEL_GCM = 1
>> ++    #DEFINES += -DUSE_HW_AES -DINTEL_GCM
>> ++    #ASFILES += intel-aes.s intel-gcm.s
>> ++    #EXTRA_SRCS += intel-gcm-wrap.c
>> ++    #INTEL_GCM = 1
>> +     MPI_SRCS += mpi_amd64.c mp_comba.c
>> + endif
>> + ifeq ($(CPU_ARCH),x86)
>>
>
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