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From gn...@apache.org
Subject [incubator-nuttx] 05/05: Clean code to match nxstyle requirements
Date Mon, 04 May 2020 14:32:39 GMT
This is an automated email from the ASF dual-hosted git repository.

gnutt pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git

commit aea90e7cf0af0017046aa4d002cc657d84f05223
Author: Brennan Ashton <bashton@brennanashton.com>
AuthorDate: Wed Apr 29 21:46:46 2020 -0700

    Clean code to match nxstyle requirements
    
    Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
---
 arch/x86_64/include/intel64/arch.h         | 20 ++++++++++++--------
 arch/x86_64/src/intel64/intel64_handlers.c | 20 ++++++++++++++++----
 arch/x86_64/src/intel64/intel64_lowsetup.c |  8 +++++---
 arch/x86_64/src/intel64/intel64_rng.c      |  2 +-
 arch/x86_64/src/intel64/up_irq.c           | 15 +++++++++------
 arch/x86_64/src/intel64/up_regdump.c       | 10 +++-------
 arch/x86_64/src/intel64/up_releasestack.c  |  3 ---
 7 files changed, 46 insertions(+), 32 deletions(-)

diff --git a/arch/x86_64/include/intel64/arch.h b/arch/x86_64/include/intel64/arch.h
index 26d127d..ae09753 100644
--- a/arch/x86_64/include/intel64/arch.h
+++ b/arch/x86_64/include/intel64/arch.h
@@ -231,7 +231,7 @@
 # define IOAPIC_REG_ID          0x00       /* Register index: ID */
 # define IOAPIC_REG_VER         0x01       /* Register index: version */
 # define IOAPIC_REG_TABLE       0x10       /* Redirection table base */
-#  define IOAPIC_PIN_DISABLE           (1 << 16)  /* Disable */
+# define IOAPIC_PIN_DISABLE     (1 << 16)  /* Disable */
 
 /* PIC related Definitions */
 
@@ -257,8 +257,9 @@
 /* IDT data structures ******************************************************
  *
  * The Interrupt Descriptor Table (IDT) is a data structure used by the x86
- * architecture to implement an interrupt vector table. The IDT is used by the
- * processor to determine the correct response to interrupts and exceptions.
+ * architecture to implement an interrupt vector table. The IDT is used by
+ * the processor to determine the correct response to interrupts and
+ * exceptions.
  */
 
 begin_packed_struct struct idt_entry_s
@@ -286,7 +287,8 @@ begin_packed_struct struct idt_ptr_s
  *
  * The Global Descriptor Table (GDT) is a data structure used by the x86
  * architecture to implement segments and privilege levels. The GDT is used
- * by the processor to determine current privilege level and memory access right.
+ * by the processor to determine current privilege level and memory access
+ * right.
  */
 
 begin_packed_struct struct gdt_entry_s
@@ -321,8 +323,8 @@ begin_packed_struct struct gdt_ptr_s
 /* IST data structures ******************************************************
  *
  * The Interrupt Stack Table (GDT) is a data structure used by the x86-64
- * architecture to automatically switch stack on interrupt and privilege change.
- * It allows setting up to 7 different stack for interrupts.
+ * architecture to automatically switch stack on interrupt and privilege
+ * change. It allows setting up to 7 different stack for interrupts.
  */
 
 begin_packed_struct struct ist_s
@@ -342,7 +344,7 @@ begin_packed_struct struct ist_s
   uint64_t reserved3;            /* reserved */
   uint64_t reserved4;            /* reserved */
   uint16_t reserved5;            /* reserved */
-  uint16_t IOPB_offset;          /* IOPB_offset */
+  uint16_t IOPB_OFFSET;          /* IOPB_offset */
 } end_packed_struct;
 
 /****************************************************************************
@@ -560,7 +562,9 @@ extern volatile uint8_t gdt64_low;
 extern volatile uint8_t gdt64_ist_low;
 extern volatile uint8_t gdt64_low_end;
 
-/* The actual address of the page table and gdt/ist after mapping the kernel in high address*/
+/* The actual address of the page table and gdt/ist after mapping the kernel
+ * in high address
+ */
 
 extern volatile uint64_t *pdpt;
 extern volatile uint64_t *pd;
diff --git a/arch/x86_64/src/intel64/intel64_handlers.c b/arch/x86_64/src/intel64/intel64_handlers.c
index 4dc1db7..c6963e9 100644
--- a/arch/x86_64/src/intel64/intel64_handlers.c
+++ b/arch/x86_64/src/intel64/intel64_handlers.c
@@ -136,8 +136,14 @@ uint64_t *isr_handler(uint64_t *regs, uint64_t irq)
 {
 #ifdef CONFIG_SUPPRESS_INTERRUPTS
   board_autoled_on(LED_INIRQ);
-  PANIC(); /* Doesn't return */
-  return regs;               /* To keep the compiler happy */
+
+  /* Doesn't return */
+
+  PANIC();
+
+  /* To keep the compiler happy */
+
+  return regs;
 #else
 
   DEBUGASSERT(g_current_regs == NULL);
@@ -191,8 +197,14 @@ uint64_t *irq_handler(uint64_t *regs, uint64_t irq_no)
 {
 #ifdef CONFIG_SUPPRESS_INTERRUPTS
   board_autoled_on(LED_INIRQ);
-  PANIC(); /* Doesn't return */
-  return regs;               /* To keep the compiler happy */
+
+  /* Doesn't return */
+
+  PANIC();
+
+  /* To keep the compiler happy */
+
+  return regs;
 #else
   uint64_t *ret;
   int irq;
diff --git a/arch/x86_64/src/intel64/intel64_lowsetup.c b/arch/x86_64/src/intel64/intel64_lowsetup.c
index ff63b81..39c965e 100644
--- a/arch/x86_64/src/intel64/intel64_lowsetup.c
+++ b/arch/x86_64/src/intel64/intel64_lowsetup.c
@@ -41,7 +41,9 @@
  * Public Data
  ****************************************************************************/
 
-/* The actual address of the page table and gdt/ist after mapping the kernel in high address*/
+/* The actual address of the page table and gdt/ist after mapping the kernel
+ * in high address.
+ */
 
 volatile uint64_t *pdpt;
 volatile uint64_t *pd;
@@ -69,11 +71,11 @@ volatile struct gdt_entry_s *gdt64;
 
 void up_lowsetup(void)
 {
-  /* we should be in long mode at this point*/
+  /* we should be in long mode at this point */
 
   /* GDT is loaded with 64bit GDT  */
 
-  /* Paging is enabled*/
+  /* Paging is enabled */
 
   /* Setup pointers for accessing Page table and GDT in high address */
 
diff --git a/arch/x86_64/src/intel64/intel64_rng.c b/arch/x86_64/src/intel64/intel64_rng.c
index 23bb1e1..a68d6c3 100644
--- a/arch/x86_64/src/intel64/intel64_rng.c
+++ b/arch/x86_64/src/intel64/intel64_rng.c
@@ -70,7 +70,7 @@ static const struct file_operations g_rngops =
 {
   0,               /* open */
   0,               /* close */
-  x86_rngread,   /* read */
+  x86_rngread,     /* read */
   0,               /* write */
   0,               /* seek */
   0                /* ioctl */
diff --git a/arch/x86_64/src/intel64/up_irq.c b/arch/x86_64/src/intel64/up_irq.c
index 7c34327..ac4eb19 100644
--- a/arch/x86_64/src/intel64/up_irq.c
+++ b/arch/x86_64/src/intel64/up_irq.c
@@ -176,8 +176,9 @@ static void up_ist_init(void)
   memset(&tss_l, 0, sizeof(tss_l));
   memset(&tss_h, 0, sizeof(tss_h));
 
-  tss_l.limit_low = (((104 - 1) & 0xffff)); /* Segment limit = TSS size - 1 */
-  tss_l.base_low  = ((uintptr_t)ist64 & 0x00ffffff);  /* Low address 1 */
+  tss_l.limit_low = (((104 - 1) & 0xffff));    /* Segment limit = TSS size - 1 */
+
+  tss_l.base_low  = ((uintptr_t)ist64 & 0x00ffffff);          /* Low address 1 */
   tss_l.base_high = (((uintptr_t)ist64 & 0xff000000) >> 24);  /* Low address 2
*/
 
   tss_l.P = 1;
@@ -193,7 +194,8 @@ static void up_ist_init(void)
 
   /* memcpy used to handle type punning compiler warning */
 
-  memcpy((void *)&gdt64[X86_GDT_ISTH_SEL_NUM], (void *)&tss_h, sizeof(gdt64[0]));
+  memcpy((void *)&gdt64[X86_GDT_ISTH_SEL_NUM],
+      (void *)&tss_h, sizeof(gdt64[0]));
 
   ist64->IST1 = (uintptr_t)g_interrupt_stack_end;
   ist64->IST2 = (uintptr_t)g_isr_stack_end;
@@ -317,7 +319,8 @@ static void up_apic_init(void)
  * Name: legacy_pic_irq_handler
  *
  * Description:
- *  This function will capture will legacy 8259 PIC IRQ using virtual wire mode
+ *  This function will capture will legacy 8259 PIC IRQ using virtual wire
+ *  mode
  *
  ****************************************************************************/
 
@@ -375,8 +378,8 @@ static void up_idtentry(unsigned int index, uint64_t base, uint16_t sel,
   entry->sel     = sel;
   entry->zero    = 0;
 
-  /* We must uncomment the OR below when we get to using user-mode. It sets the
-   * interrupt gate's privilege level to 3.
+  /* We must uncomment the OR below when we get to using user-mode. It sets
+   * the interrupt gate's privilege level to 3.
    */
 
   entry->flags  = flags; /* | 0x60 */
diff --git a/arch/x86_64/src/intel64/up_regdump.c b/arch/x86_64/src/intel64/up_regdump.c
index 904f38e..70e8daf 100644
--- a/arch/x86_64/src/intel64/up_regdump.c
+++ b/arch/x86_64/src/intel64/up_regdump.c
@@ -74,7 +74,6 @@ void print_mem(void *sp, size_t size)
 void backtrace(uint64_t rbp)
 {
   int i;
-  int j;
 
   _alert("Frame Dump (64 bytes):\n");
 
@@ -101,12 +100,8 @@ void backtrace(uint64_t rbp)
 
 void up_registerdump(uint64_t *regs)
 {
-  int i;
-  int j;
   uint64_t mxcsr;
   uint64_t cr2;
-  uint64_t rbp;
-  char buf[9];
 
   asm volatile ("stmxcsr %0"::"m"(mxcsr):"memory");
   asm volatile ("mov %%cr2, %%rax; mov %%rax, %0"::"m"(cr2):"memory", "rax");
@@ -138,11 +133,12 @@ void up_registerdump(uint64_t *regs)
 
   if (regs[REG_RSP] > 0 && regs[REG_RSP] < 0x1000000)
     {
-      print_mem(regs[REG_RSP] - 512, 128 * 0x200000 - regs[REG_RSP] + 512);
+      print_mem((void *)regs[REG_RSP] - 512,
+          128 * 0x200000 - regs[REG_RSP] + 512);
     }
   else
     {
-      print_mem(regs[REG_RSP] - 512, 1024);
+      print_mem((void *)regs[REG_RSP] - 512, 1024);
     }
 
 #ifdef CONFIG_DEBUG_NOOPT
diff --git a/arch/x86_64/src/intel64/up_releasestack.c b/arch/x86_64/src/intel64/up_releasestack.c
index 2a66060..a2a1a11 100644
--- a/arch/x86_64/src/intel64/up_releasestack.c
+++ b/arch/x86_64/src/intel64/up_releasestack.c
@@ -79,9 +79,6 @@
 
 void up_release_stack(FAR struct tcb_s *dtcb, uint8_t ttype)
 {
-  struct vma_s *ptr;
-  int i;
-
   /* Is there a stack allocated? */
 
   if (dtcb->stack_alloc_ptr)


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