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From aguettou...@apache.org
Subject [incubator-nuttx] 01/02: arch/arm: Rename all up_*.c files to arm_*.c
Date Fri, 01 May 2020 01:11:12 GMT
This is an automated email from the ASF dual-hosted git repository.

aguettouche pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git

commit c6c712b2fc10fe527883d829798f1a11d16a6900
Author: Gregory Nutt <gnutt@nuttx.org>
AuthorDate: Thu Apr 30 15:19:35 2020 -0600

    arch/arm:  Rename all up_*.c files to arm_*.c
---
 arch/arm/src/a1x/Make.defs                         | 59 ++++++++--------------
 arch/arm/src/am335x/Make.defs                      | 57 ++++++++-------------
 .../src/arm/{up_allocpage.c => arm_allocpage.c}    |  2 +-
 arch/arm/src/arm/{up_assert.c => arm_assert.c}     |  2 +-
 .../src/arm/{up_blocktask.c => arm_blocktask.c}    |  2 +-
 .../arm/{up_checkmapping.c => arm_checkmapping.c}  |  2 +-
 .../src/arm/{up_dataabort.c => arm_dataabort.c}    |  2 +-
 arch/arm/src/arm/{up_doirq.c => arm_doirq.c}       |  2 +-
 .../arm/{up_initialstate.c => arm_initialstate.c}  |  2 +-
 .../arm/{up_pginitialize.c => arm_pginitialize.c}  |  2 +-
 .../{up_prefetchabort.c => arm_prefetchabort.c}    |  2 +-
 .../{up_releasepending.c => arm_releasepending.c}  |  2 +-
 ...{up_reprioritizertr.c => arm_reprioritizertr.c} |  2 +-
 ...schedulesigaction.c => arm_schedulesigaction.c} |  2 +-
 .../src/arm/{up_sigdeliver.c => arm_sigdeliver.c}  |  2 +-
 arch/arm/src/arm/{up_syscall.c => arm_syscall.c}   |  2 +-
 .../arm/{up_unblocktask.c => arm_unblocktask.c}    |  2 +-
 .../{up_undefinedinsn.c => arm_undefinedinsn.c}    |  2 +-
 arch/arm/src/arm/{up_va2pte.c => arm_va2pte.c}     |  2 +-
 arch/arm/src/armv6-m/{up_assert.c => arm_assert.c} |  2 +-
 .../armv6-m/{up_blocktask.c => arm_blocktask.c}    |  2 +-
 arch/arm/src/armv6-m/{up_doirq.c => arm_doirq.c}   |  2 +-
 .../src/armv6-m/{up_dumpnvic.c => arm_dumpnvic.c}  |  2 +-
 .../armv6-m/{up_hardfault.c => arm_hardfault.c}    |  2 +-
 .../{up_initialstate.c => arm_initialstate.c}      |  2 +-
 .../{up_releasepending.c => arm_releasepending.c}  |  2 +-
 .../arm_reprioritizertr.c}                         |  2 +-
 ...schedulesigaction.c => arm_schedulesigaction.c} |  2 +-
 .../armv6-m/{up_sigdeliver.c => arm_sigdeliver.c}  |  2 +-
 ...{up_signal_dispatch.c => arm_signal_dispatch.c} |  2 +-
 arch/arm/src/armv6-m/{up_svcall.c => arm_svcall.c} |  2 +-
 .../{up_systemreset.c => arm_systemreset.c}        |  2 +-
 .../{up_unblocktask.c => arm_unblocktask.c}        |  2 +-
 .../src/armv6-m/{up_vectors.c => arm_vectors.c}    |  2 +-
 arch/arm/src/armv7-a/arm_blocktask.c               |  2 +-
 .../src/{armv7-r/arm_vfork.S => armv7-a/vfork.S}   | 41 +++++----------
 arch/arm/src/armv7-m/{up_assert.c => arm_assert.c} |  2 +-
 .../armv7-m/{up_blocktask.c => arm_blocktask.c}    |  2 +-
 arch/arm/src/armv7-m/{up_cache.c => arm_cache.c}   |  2 +-
 arch/arm/src/armv7-m/{up_doirq.c => arm_doirq.c}   |  2 +-
 .../armv7-m/{up_hardfault.c => arm_hardfault.c}    |  2 +-
 .../{up_initialstate.c => arm_initialstate.c}      |  2 +-
 arch/arm/src/armv7-m/{up_itm.c => arm_itm.c}       |  2 +-
 .../armv7-m/{up_itm_syslog.c => arm_itm_syslog.c}  |  2 +-
 .../src/armv7-m/{up_memfault.c => arm_memfault.c}  |  2 +-
 arch/arm/src/armv7-m/{up_mpu.c => arm_mpu.c}       |  2 +-
 .../{up_ramvec_attach.c => arm_ramvec_attach.c}    |  2 +-
 ...ramvec_initialize.c => arm_ramvec_initialize.c} |  2 +-
 .../{up_releasepending.c => arm_releasepending.c}  |  2 +-
 .../arm_reprioritizertr.c}                         |  2 +-
 ...schedulesigaction.c => arm_schedulesigaction.c} |  2 +-
 .../armv7-m/{up_sigdeliver.c => arm_sigdeliver.c}  |  2 +-
 ...{up_signal_dispatch.c => arm_signal_dispatch.c} |  2 +-
 .../armv7-m/{up_stackcheck.c => arm_stackcheck.c}  |  2 +-
 arch/arm/src/armv7-m/{up_svcall.c => arm_svcall.c} |  2 +-
 .../{up_systemreset.c => arm_systemreset.c}        |  2 +-
 .../src/armv7-m/{up_systick.c => arm_systick.c}    |  2 +-
 .../{up_trigger_irq.c => arm_trigger_irq.c}        |  2 +-
 .../{up_unblocktask.c => arm_unblocktask.c}        |  2 +-
 .../src/armv7-m/{up_vectors.c => arm_vectors.c}    |  2 +-
 arch/arm/src/armv7-r/arm_blocktask.c               |  2 +-
 .../src/{armv7-a/arm_vfork.S => armv7-r/vfork.S}   | 41 +++++----------
 arch/arm/src/c5471/Make.defs                       | 18 +++----
 arch/arm/src/common/README_lwl_console.txt         |  2 +-
 .../{up_allocateheap.c => arm_allocateheap.c}      |  2 +-
 .../common/{up_checkstack.c => arm_checkstack.c}   |  2 +-
 .../common/{up_createstack.c => arm_createstack.c} |  2 +-
 .../src/common/{up_etherstub.c => arm_etherstub.c} |  2 +-
 arch/arm/src/common/{up_exit.c => arm_exit.c}      |  2 +-
 arch/arm/src/common/{up_hostfs.c => arm_hostfs.c}  |  2 +-
 arch/arm/src/common/{up_idle.c => arm_idle.c}      |  2 +-
 .../common/{up_initialize.c => arm_initialize.c}   | 41 +++++----------
 ...p_interruptcontext.c => arm_interruptcontext.c} |  2 +-
 .../arm/src/common/{up_lowputs.c => arm_lowputs.c} |  2 +-
 .../common/{up_lwl_console.c => arm_lwl_console.c} |  0
 arch/arm/src/common/{up_mdelay.c => arm_mdelay.c}  |  2 +-
 .../common/{up_modifyreg16.c => arm_modifyreg16.c} |  2 +-
 .../common/{up_modifyreg32.c => arm_modifyreg32.c} |  2 +-
 .../common/{up_modifyreg8.c => arm_modifyreg8.c}   |  2 +-
 .../{up_pthread_start.c => arm_pthread_start.c}    |  2 +-
 arch/arm/src/common/{up_puts.c => arm_puts.c}      |  2 +-
 .../{up_releasestack.c => arm_releasestack.c}      |  2 +-
 .../common/{up_semi_syslog.c => arm_semi_syslog.c} |  2 +-
 .../common/{up_stackframe.c => arm_stackframe.c}   |  2 +-
 .../common/{up_task_start.c => arm_task_start.c}   |  2 +-
 arch/arm/src/common/{up_udelay.c => arm_udelay.c}  |  2 +-
 .../src/common/{up_usestack.c => arm_usestack.c}   |  2 +-
 arch/arm/src/common/{up_vfork.c => arm_vfork.c}    |  2 +-
 arch/arm/src/common/up_internal.h                  |  6 +--
 arch/arm/src/cxd56xx/Make.defs                     | 28 +++++-----
 arch/arm/src/dm320/Make.defs                       | 18 +++----
 arch/arm/src/efm32/Make.defs                       | 28 +++++-----
 arch/arm/src/imx1/Make.defs                        | 18 +++----
 arch/arm/src/imx6/Make.defs                        | 56 ++++++++------------
 arch/arm/src/imxrt/Make.defs                       | 32 ++++++------
 arch/arm/src/kinetis/Make.defs                     | 36 ++++++-------
 arch/arm/src/kl/Make.defs                          | 24 ++++-----
 arch/arm/src/lc823450/Make.defs                    | 30 +++++------
 arch/arm/src/lpc17xx_40xx/Make.defs                | 34 ++++++-------
 arch/arm/src/lpc214x/Make.defs                     | 20 ++++----
 arch/arm/src/lpc2378/Make.defs                     | 20 ++++----
 arch/arm/src/lpc31xx/Make.defs                     | 22 ++++----
 arch/arm/src/lpc43xx/Make.defs                     | 28 +++++-----
 arch/arm/src/lpc43xx/chip.h                        | 41 +++++----------
 arch/arm/src/lpc43xx/lpc43_ethernet.c              |  2 +-
 arch/arm/src/lpc54xx/Make.defs                     | 28 +++++-----
 arch/arm/src/lpc54xx/lpc54_ethernet.c              |  2 +-
 arch/arm/src/max326xx/Make.defs                    | 26 +++++-----
 arch/arm/src/moxart/Make.defs                      | 14 ++---
 arch/arm/src/nrf52/Make.defs                       | 26 +++++-----
 arch/arm/src/nuc1xx/Make.defs                      | 24 ++++-----
 arch/arm/src/s32k1xx/Make.defs                     | 12 ++---
 arch/arm/src/s32k1xx/s32k11x/Make.defs             | 14 ++---
 arch/arm/src/s32k1xx/s32k14x/Make.defs             | 16 +++---
 arch/arm/src/sam34/Make.defs                       | 30 +++++------
 arch/arm/src/sama5/Make.defs                       | 56 ++++++++------------
 arch/arm/src/sama5/sam_ethernet.c                  |  2 +-
 arch/arm/src/samd2l2/Make.defs                     | 24 ++++-----
 arch/arm/src/samd5e5/Make.defs                     | 26 +++++-----
 arch/arm/src/samd5e5/sam_ethernet.c                |  2 +-
 arch/arm/src/samv7/Make.defs                       | 34 ++++++-------
 arch/arm/src/samv7/sam_ethernet.c                  |  2 +-
 arch/arm/src/stm32/Make.defs                       | 34 ++++++-------
 arch/arm/src/stm32/stm32_eth.c                     |  2 +-
 arch/arm/src/stm32f0l0g0/Make.defs                 | 24 ++++-----
 arch/arm/src/stm32f7/Make.defs                     | 36 ++++++-------
 arch/arm/src/stm32f7/stm32_ethernet.c              |  2 +-
 arch/arm/src/stm32h7/Make.defs                     | 36 ++++++-------
 arch/arm/src/stm32h7/stm32_ethernet.c              |  2 +-
 arch/arm/src/stm32h7/stm32_rcc.h                   | 45 ++++++-----------
 arch/arm/src/stm32l4/Make.defs                     | 30 +++++------
 arch/arm/src/str71x/Make.defs                      | 20 ++++----
 arch/arm/src/tiva/Make.defs                        | 34 ++++++-------
 arch/arm/src/tiva/tm4c/tm4c_ethernet.c             | 46 ++++++-----------
 arch/arm/src/tms570/Make.defs                      | 56 ++++++++------------
 arch/arm/src/xmc4/Make.defs                        | 36 ++++++-------
 136 files changed, 724 insertions(+), 879 deletions(-)

diff --git a/arch/arm/src/a1x/Make.defs b/arch/arm/src/a1x/Make.defs
index aae34c2..b8ad242 100644
--- a/arch/arm/src/a1x/Make.defs
+++ b/arch/arm/src/a1x/Make.defs
@@ -1,35 +1,20 @@
 ############################################################################
 # arch/arm/a1x/Make.defs
 #
-#   Copyright (C) 2013-2014, 2016, 2018 Gregory Nutt. All rights reserved.
-#   Author: Gregory Nutt <gnutt@nuttx.org>
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
 #
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
+#   http://www.apache.org/licenses/LICENSE-2.0
 #
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name Gregory Nutt nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
 #
 ############################################################################
 
@@ -54,17 +39,17 @@ endif
 # Common assembly language files
 
 CMN_ASRCS += arm_vectors.S arm_fpuconfig.S arm_fullcontextrestore.S
-CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S arm_vfork.S
-CMN_ASRCS += arm_testset.S arm_fetchadd.S
+CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S
+CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
 CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
 CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
 
 # Common C source files
 
-CMN_CSRCS  = up_initialize.c up_interruptcontext.c up_exit.c up_createstack.c
-CMN_CSRCS += up_releasestack.c up_usestack.c up_vfork.c up_puts.c up_mdelay.c
-CMN_CSRCS += up_stackframe.c up_udelay.c up_modifyreg8.c up_modifyreg16.c
-CMN_CSRCS += up_modifyreg32.c
+CMN_CSRCS  = arm_initialize.c arm_interruptcontext.c arm_exit.c arm_createstack.c
+CMN_CSRCS += arm_releasestack.c arm_usestack.c arm_vfork.c arm_puts.c arm_mdelay.c
+CMN_CSRCS += arm_stackframe.c arm_udelay.c arm_modifyreg8.c arm_modifyreg16.c
+CMN_CSRCS += arm_modifyreg32.c
 
 CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
 CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
@@ -74,12 +59,12 @@ CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
 
 # Use common heap allocation for now (may need to be customized later)
 
-CMN_CSRCS += up_allocateheap.c
+CMN_CSRCS += arm_allocateheap.c
 
 # Configuration dependent C and assembly language files
 
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
-CMN_CSRCS += up_idle.c
+CMN_CSRCS += arm_idle.c
 endif
 
 ifeq ($(CONFIG_PAGING),y)
@@ -88,7 +73,7 @@ CMN_CSRCS += arm_va2pte.c
 endif
 
 ifeq ($(CONFIG_BUILD_KERNEL),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c arm_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c arm_signal_dispatch.c
 endif
 
 ifeq ($(CONFIG_ARCH_ADDRENV),y)
@@ -119,7 +104,7 @@ CMN_CSRCS += arm_copyarmstate.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 # A1x-specific assembly language files
diff --git a/arch/arm/src/am335x/Make.defs b/arch/arm/src/am335x/Make.defs
index bdd28b8..d83a83f 100644
--- a/arch/arm/src/am335x/Make.defs
+++ b/arch/arm/src/am335x/Make.defs
@@ -1,35 +1,20 @@
 ############################################################################
 # arch/arm/am335x/Make.defs
 #
-#   Copyright (C) 2019 Gregory Nutt. All rights reserved.
-#   Author: Gregory Nutt <gnutt@nuttx.org>
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
 #
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
+#   http://www.apache.org/licenses/LICENSE-2.0
 #
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
 #
 ############################################################################
 
@@ -54,17 +39,17 @@ endif
 # Common assembly language files
 
 CMN_ASRCS += arm_vectors.S arm_fpuconfig.S arm_fullcontextrestore.S
-CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S arm_vfork.S
-CMN_ASRCS += arm_testset.S
+CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S
+CMN_ASRCS += arm_testset.S vfork.S
 CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
 CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
 
 # Common C source files
 
-CMN_CSRCS  = up_initialize.c up_idle.c up_interruptcontext.c up_exit.c
-CMN_CSRCS += up_createstack.c up_releasestack.c up_usestack.c up_vfork.c
-CMN_CSRCS += up_puts.c up_mdelay.c up_stackframe.c up_udelay.c
-CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
+CMN_CSRCS  = arm_initialize.c arm_idle.c arm_interruptcontext.c arm_exit.c
+CMN_CSRCS += arm_createstack.c arm_releasestack.c arm_usestack.c arm_vfork.c
+CMN_CSRCS += arm_puts.c arm_mdelay.c arm_stackframe.c arm_udelay.c
+CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
 
 CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
 CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
@@ -74,7 +59,7 @@ CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
 
 # Use common heap allocation for now (may need to be customized later)
 
-CMN_CSRCS += up_allocateheap.c
+CMN_CSRCS += arm_allocateheap.c
 
 # Configuration dependent C and assembly language files
 
@@ -84,7 +69,7 @@ CMN_CSRCS += arm_va2pte.c
 endif
 
 ifeq ($(CONFIG_BUILD_KERNEL),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c arm_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c arm_signal_dispatch.c
 endif
 
 ifeq ($(CONFIG_ARCH_ADDRENV),y)
@@ -115,7 +100,7 @@ CMN_CSRCS += arm_copyarmstate.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 # AM335x-specific assembly language files
diff --git a/arch/arm/src/arm/up_allocpage.c b/arch/arm/src/arm/arm_allocpage.c
similarity index 99%
rename from arch/arm/src/arm/up_allocpage.c
rename to arch/arm/src/arm/arm_allocpage.c
index 853fc30..1777e35 100644
--- a/arch/arm/src/arm/up_allocpage.c
+++ b/arch/arm/src/arm/arm_allocpage.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/arm/up_allocpage.c
+ * arch/arm/src/arm/arm_allocpage.c
  * Allocate a new page and map it to the fault address of a task.
  *
  *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
diff --git a/arch/arm/src/arm/up_assert.c b/arch/arm/src/arm/arm_assert.c
similarity index 99%
rename from arch/arm/src/arm/up_assert.c
rename to arch/arm/src/arm/arm_assert.c
index 271795b..1f8181c 100644
--- a/arch/arm/src/arm/up_assert.c
+++ b/arch/arm/src/arm/arm_assert.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/arm/up_assert.c
+ * arch/arm/src/arm/arm_assert.c
  *
  *   Copyright (C) 2007-2010, 2012-2016, 2018 Gregory Nutt. All rights
  *     reserved.
diff --git a/arch/arm/src/arm/up_blocktask.c b/arch/arm/src/arm/arm_blocktask.c
similarity index 99%
rename from arch/arm/src/arm/up_blocktask.c
rename to arch/arm/src/arm/arm_blocktask.c
index 0561fe3..3611885 100644
--- a/arch/arm/src/arm/up_blocktask.c
+++ b/arch/arm/src/arm/arm_blocktask.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/arm/up_blocktask.c
+ * arch/arm/src/arm/arm_blocktask.c
  *
  *   Copyright (C) 2007-2009, 2013-2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/arm/up_checkmapping.c b/arch/arm/src/arm/arm_checkmapping.c
similarity index 99%
rename from arch/arm/src/arm/up_checkmapping.c
rename to arch/arm/src/arm/arm_checkmapping.c
index f86b6de..aaedd54 100644
--- a/arch/arm/src/arm/up_checkmapping.c
+++ b/arch/arm/src/arm/arm_checkmapping.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/arm/up_checkmapping.c
+ * arch/arm/src/arm/arm_checkmapping.c
  * Check if the current task's fault address has been mapped into the virtual
  * address space.
  *
diff --git a/arch/arm/src/arm/up_dataabort.c b/arch/arm/src/arm/arm_dataabort.c
similarity index 99%
rename from arch/arm/src/arm/up_dataabort.c
rename to arch/arm/src/arm/arm_dataabort.c
index 2a348b4..4e5ca56 100644
--- a/arch/arm/src/arm/up_dataabort.c
+++ b/arch/arm/src/arm/arm_dataabort.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/arm/up_dataabort.c
+ * arch/arm/src/arm/arm_dataabort.c
  *
  *   Copyright (C) 2007-2011, 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/arm/up_doirq.c b/arch/arm/src/arm/arm_doirq.c
similarity index 99%
rename from arch/arm/src/arm/up_doirq.c
rename to arch/arm/src/arm/arm_doirq.c
index 38512a3..a13fa12 100644
--- a/arch/arm/src/arm/up_doirq.c
+++ b/arch/arm/src/arm/arm_doirq.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/arm/up_doirq.c
+ * arch/arm/src/arm/arm_doirq.c
  *
  *   Copyright (C) 2007-2009, 2011, 2013-2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/arm/up_initialstate.c b/arch/arm/src/arm/arm_initialstate.c
similarity index 99%
rename from arch/arm/src/arm/up_initialstate.c
rename to arch/arm/src/arm/arm_initialstate.c
index 7b76abe..ed0ba1b 100644
--- a/arch/arm/src/arm/up_initialstate.c
+++ b/arch/arm/src/arm/arm_initialstate.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/arm/up_initialstate.c
+ *  arch/arm/src/arm/arm_initialstate.c
  *
  *   Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/arm/up_pginitialize.c b/arch/arm/src/arm/arm_pginitialize.c
similarity index 98%
rename from arch/arm/src/arm/up_pginitialize.c
rename to arch/arm/src/arm/arm_pginitialize.c
index 25cb917..9ec24fc 100644
--- a/arch/arm/src/arm/up_pginitialize.c
+++ b/arch/arm/src/arm/arm_pginitialize.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/arm/up_pginitialize.c
+ * arch/arm/src/arm/arm_pginitialize.c
  * Initialize the MMU for on-demand paging support.
  *
  *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
diff --git a/arch/arm/src/arm/up_prefetchabort.c b/arch/arm/src/arm/arm_prefetchabort.c
similarity index 99%
rename from arch/arm/src/arm/up_prefetchabort.c
rename to arch/arm/src/arm/arm_prefetchabort.c
index 7fc02b1..c9db246 100644
--- a/arch/arm/src/arm/up_prefetchabort.c
+++ b/arch/arm/src/arm/arm_prefetchabort.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/arm/up_prefetchabort.c
+ *  arch/arm/src/arm/arm_prefetchabort.c
  *
  *   Copyright (C) 2007-2011, 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/arm/up_releasepending.c b/arch/arm/src/arm/arm_releasepending.c
similarity index 98%
rename from arch/arm/src/arm/up_releasepending.c
rename to arch/arm/src/arm/arm_releasepending.c
index 0b1a2ac..22d560a 100644
--- a/arch/arm/src/arm/up_releasepending.c
+++ b/arch/arm/src/arm/arm_releasepending.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/arm/up_releasepending.c
+ *  arch/arm/src/arm/arm_releasepending.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/arm/up_reprioritizertr.c b/arch/arm/src/arm/arm_reprioritizertr.c
similarity index 99%
rename from arch/arm/src/arm/up_reprioritizertr.c
rename to arch/arm/src/arm/arm_reprioritizertr.c
index e66f284..5afa279 100644
--- a/arch/arm/src/arm/up_reprioritizertr.c
+++ b/arch/arm/src/arm/arm_reprioritizertr.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/arm/up_reprioritizertr.c
+ *  arch/arm/src/arm/arm_reprioritizertr.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/arm/up_schedulesigaction.c b/arch/arm/src/arm/arm_schedulesigaction.c
similarity index 99%
rename from arch/arm/src/arm/up_schedulesigaction.c
rename to arch/arm/src/arm/arm_schedulesigaction.c
index 5b73169..db9542a 100644
--- a/arch/arm/src/arm/up_schedulesigaction.c
+++ b/arch/arm/src/arm/arm_schedulesigaction.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/arm/up_schedulesigaction.c
+ * arch/arm/src/arm/arm_schedulesigaction.c
  *
  *   Copyright (C) 2007-2010, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/arm/up_sigdeliver.c b/arch/arm/src/arm/arm_sigdeliver.c
similarity index 99%
rename from arch/arm/src/arm/up_sigdeliver.c
rename to arch/arm/src/arm/arm_sigdeliver.c
index 66c6fc9..1bcda93 100644
--- a/arch/arm/src/arm/up_sigdeliver.c
+++ b/arch/arm/src/arm/arm_sigdeliver.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/arm/up_sigdeliver.c
+ * arch/arm/src/arm/arm_sigdeliver.c
  *
  *   Copyright (C) 2007-2010, 2015, 2018-2019 Gregory Nutt. All rights
  *     reserved.
diff --git a/arch/arm/src/arm/up_syscall.c b/arch/arm/src/arm/arm_syscall.c
similarity index 98%
rename from arch/arm/src/arm/up_syscall.c
rename to arch/arm/src/arm/arm_syscall.c
index c52b036..48c6e2d 100644
--- a/arch/arm/src/arm/up_syscall.c
+++ b/arch/arm/src/arm/arm_syscall.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/arm/up_syscall.c
+ *  arch/arm/src/arm/arm_syscall.c
  *
  *   Copyright (C) 2007-2009, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/arm/up_unblocktask.c b/arch/arm/src/arm/arm_unblocktask.c
similarity index 99%
rename from arch/arm/src/arm/up_unblocktask.c
rename to arch/arm/src/arm/arm_unblocktask.c
index 79906a3..24979c8 100644
--- a/arch/arm/src/arm/up_unblocktask.c
+++ b/arch/arm/src/arm/arm_unblocktask.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/arm/up_unblocktask.c
+ *  arch/arm/src/arm/arm_unblocktask.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/arm/up_undefinedinsn.c b/arch/arm/src/arm/arm_undefinedinsn.c
similarity index 98%
rename from arch/arm/src/arm/up_undefinedinsn.c
rename to arch/arm/src/arm/arm_undefinedinsn.c
index 364b072..6ef9bae 100644
--- a/arch/arm/src/arm/up_undefinedinsn.c
+++ b/arch/arm/src/arm/arm_undefinedinsn.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/arm/up_undefinedinsn.c
+ * arch/arm/src/arm/arm_undefinedinsn.c
  *
  *   Copyright (C) 2007-2009, 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/arm/up_va2pte.c b/arch/arm/src/arm/arm_va2pte.c
similarity index 99%
rename from arch/arm/src/arm/up_va2pte.c
rename to arch/arm/src/arm/arm_va2pte.c
index 16230f8..20c5a36 100644
--- a/arch/arm/src/arm/up_va2pte.c
+++ b/arch/arm/src/arm/arm_va2pte.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/arm/up_va2pte.c
+ * arch/arm/src/arm/arm_va2pte.c
  * Utility to map a virtual address to a L2 page table entry.
  *
  *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
diff --git a/arch/arm/src/armv6-m/up_assert.c b/arch/arm/src/armv6-m/arm_assert.c
similarity index 99%
rename from arch/arm/src/armv6-m/up_assert.c
rename to arch/arm/src/armv6-m/arm_assert.c
index fa057fb..0c4a2cb 100644
--- a/arch/arm/src/armv6-m/up_assert.c
+++ b/arch/arm/src/armv6-m/arm_assert.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv6-m/up_assert.c
+ * arch/arm/src/armv6-m/arm_assert.c
  *
  *   Copyright (C) 2013-2015, 2016, 2018 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/armv6-m/up_blocktask.c b/arch/arm/src/armv6-m/arm_blocktask.c
similarity index 99%
rename from arch/arm/src/armv6-m/up_blocktask.c
rename to arch/arm/src/armv6-m/arm_blocktask.c
index 00b09a3..4c5f24a 100644
--- a/arch/arm/src/armv6-m/up_blocktask.c
+++ b/arch/arm/src/armv6-m/arm_blocktask.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv6-m/up_blocktask.c
+ * arch/arm/src/armv6-m/arm_blocktask.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv6-m/up_doirq.c b/arch/arm/src/armv6-m/arm_doirq.c
similarity index 99%
rename from arch/arm/src/armv6-m/up_doirq.c
rename to arch/arm/src/armv6-m/arm_doirq.c
index ac688ba..a058e7d 100644
--- a/arch/arm/src/armv6-m/up_doirq.c
+++ b/arch/arm/src/armv6-m/arm_doirq.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv6-m/up_doirq.c
+ * arch/arm/src/armv6-m/arm_doirq.c
  *
  *   Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/armv6-m/up_dumpnvic.c b/arch/arm/src/armv6-m/arm_dumpnvic.c
similarity index 98%
rename from arch/arm/src/armv6-m/up_dumpnvic.c
rename to arch/arm/src/armv6-m/arm_dumpnvic.c
index 8439ac6..e28c40c 100644
--- a/arch/arm/src/armv6-m/up_dumpnvic.c
+++ b/arch/arm/src/armv6-m/arm_dumpnvic.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv6-m/up_dumpnvic.c
+ * arch/arm/src/armv6-m/arm_dumpnvic.c
  *
  *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/armv6-m/up_hardfault.c b/arch/arm/src/armv6-m/arm_hardfault.c
similarity index 99%
rename from arch/arm/src/armv6-m/up_hardfault.c
rename to arch/arm/src/armv6-m/arm_hardfault.c
index ffe7e09..4d1780e 100644
--- a/arch/arm/src/armv6-m/up_hardfault.c
+++ b/arch/arm/src/armv6-m/arm_hardfault.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv6-m/up_hardfault.c
+ * arch/arm/src/armv6-m/arm_hardfault.c
  *
  *   Copyright (C) 2013, 2018 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/armv6-m/up_initialstate.c b/arch/arm/src/armv6-m/arm_initialstate.c
similarity index 99%
rename from arch/arm/src/armv6-m/up_initialstate.c
rename to arch/arm/src/armv6-m/arm_initialstate.c
index 059b9ff..31ad0df 100644
--- a/arch/arm/src/armv6-m/up_initialstate.c
+++ b/arch/arm/src/armv6-m/arm_initialstate.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv6-m/up_initialstate.c
+ * arch/arm/src/armv6-m/arm_initialstate.c
  *
  *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/armv6-m/up_releasepending.c b/arch/arm/src/armv6-m/arm_releasepending.c
similarity index 98%
rename from arch/arm/src/armv6-m/up_releasepending.c
rename to arch/arm/src/armv6-m/arm_releasepending.c
index 4b28b10..7395f8e 100644
--- a/arch/arm/src/armv6-m/up_releasepending.c
+++ b/arch/arm/src/armv6-m/arm_releasepending.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/armv6-m/up_releasepending.c
+ *  arch/arm/src/armv6-m/arm_releasepending.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_reprioritizertr.c b/arch/arm/src/armv6-m/arm_reprioritizertr.c
similarity index 99%
rename from arch/arm/src/armv7-m/up_reprioritizertr.c
rename to arch/arm/src/armv6-m/arm_reprioritizertr.c
index 8b87fc7..b3d43fa 100644
--- a/arch/arm/src/armv7-m/up_reprioritizertr.c
+++ b/arch/arm/src/armv6-m/arm_reprioritizertr.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/armv7-m/up_reprioritizertr.c
+ *  arch/arm/src/armv6-m/arm_reprioritizertr.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv6-m/up_schedulesigaction.c b/arch/arm/src/armv6-m/arm_schedulesigaction.c
similarity index 99%
rename from arch/arm/src/armv6-m/up_schedulesigaction.c
rename to arch/arm/src/armv6-m/arm_schedulesigaction.c
index 1636db6..d25d793 100644
--- a/arch/arm/src/armv6-m/up_schedulesigaction.c
+++ b/arch/arm/src/armv6-m/arm_schedulesigaction.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv6-m/up_schedulesigaction.c
+ * arch/arm/src/armv6-m/arm_schedulesigaction.c
  *
  *   Copyright (C) 2013-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/armv6-m/up_sigdeliver.c b/arch/arm/src/armv6-m/arm_sigdeliver.c
similarity index 99%
rename from arch/arm/src/armv6-m/up_sigdeliver.c
rename to arch/arm/src/armv6-m/arm_sigdeliver.c
index 4fe74ec..52cdd8b 100644
--- a/arch/arm/src/armv6-m/up_sigdeliver.c
+++ b/arch/arm/src/armv6-m/arm_sigdeliver.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv6-m/up_sigdeliver.c
+ * arch/arm/src/armv6-m/arm_sigdeliver.c
  *
  *   Copyright (C) 2013-2015, 2018-2019 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/armv6-m/up_signal_dispatch.c b/arch/arm/src/armv6-m/arm_signal_dispatch.c
similarity index 98%
rename from arch/arm/src/armv6-m/up_signal_dispatch.c
rename to arch/arm/src/armv6-m/arm_signal_dispatch.c
index 3b40ace..41c9b96 100644
--- a/arch/arm/src/armv6-m/up_signal_dispatch.c
+++ b/arch/arm/src/armv6-m/arm_signal_dispatch.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv6-m/up_signal_dispatch.c
+ * arch/arm/src/armv6-m/arm_signal_dispatch.c
  *
  *   Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/armv6-m/up_svcall.c b/arch/arm/src/armv6-m/arm_svcall.c
similarity index 99%
rename from arch/arm/src/armv6-m/up_svcall.c
rename to arch/arm/src/armv6-m/arm_svcall.c
index 489871a..21f7358 100644
--- a/arch/arm/src/armv6-m/up_svcall.c
+++ b/arch/arm/src/armv6-m/arm_svcall.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv6-m/up_svcall.c
+ * arch/arm/src/armv6-m/arm_svcall.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv6-m/up_systemreset.c b/arch/arm/src/armv6-m/arm_systemreset.c
similarity index 98%
rename from arch/arm/src/armv6-m/up_systemreset.c
rename to arch/arm/src/armv6-m/arm_systemreset.c
index cdb539d..ff76185 100644
--- a/arch/arm/src/armv6-m/up_systemreset.c
+++ b/arch/arm/src/armv6-m/arm_systemreset.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv6-m/up_systemreset.c
+ * arch/arm/src/armv6-m/arm_systemreset.c
  *
  *   Copyright (C) 2013, 2019 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/armv6-m/up_unblocktask.c b/arch/arm/src/armv6-m/arm_unblocktask.c
similarity index 98%
rename from arch/arm/src/armv6-m/up_unblocktask.c
rename to arch/arm/src/armv6-m/arm_unblocktask.c
index 66869d2..53a9102 100644
--- a/arch/arm/src/armv6-m/up_unblocktask.c
+++ b/arch/arm/src/armv6-m/arm_unblocktask.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/armv6-m/up_unblocktask.c
+ *  arch/arm/src/armv6-m/arm_unblocktask.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv6-m/up_vectors.c b/arch/arm/src/armv6-m/arm_vectors.c
similarity index 98%
rename from arch/arm/src/armv6-m/up_vectors.c
rename to arch/arm/src/armv6-m/arm_vectors.c
index ee846e7..155cd8e 100644
--- a/arch/arm/src/armv6-m/up_vectors.c
+++ b/arch/arm/src/armv6-m/arm_vectors.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv6-m/up_vectors.c
+ * arch/arm/src/armv6-m/arm_vectors.c
  *
  *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/armv7-a/arm_blocktask.c b/arch/arm/src/armv7-a/arm_blocktask.c
index b7a0625..a38e4e8 100644
--- a/arch/arm/src/armv7-a/arm_blocktask.c
+++ b/arch/arm/src/armv7-a/arm_blocktask.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-a/up_blocktask.c
+ * arch/arm/src/armv7-a/arm_blocktask.c
  *
  *   Copyright (C) 2013-2015, 2018 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/armv7-r/arm_vfork.S b/arch/arm/src/armv7-a/vfork.S
similarity index 70%
rename from arch/arm/src/armv7-r/arm_vfork.S
rename to arch/arm/src/armv7-a/vfork.S
index 93f3120..ea69ade 100644
--- a/arch/arm/src/armv7-r/arm_vfork.S
+++ b/arch/arm/src/armv7-a/vfork.S
@@ -1,35 +1,20 @@
 /****************************************************************************
- * arch/arm/src/armv7-r/arm_vfork.S
+ * arch/arm/src/armv7-a/vfork.S
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt <gnutt@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ *   http://www.apache.org/licenses/LICENSE-2.0
  *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
  *
  ****************************************************************************/
 
diff --git a/arch/arm/src/armv7-m/up_assert.c b/arch/arm/src/armv7-m/arm_assert.c
similarity index 99%
rename from arch/arm/src/armv7-m/up_assert.c
rename to arch/arm/src/armv7-m/arm_assert.c
index ae2b01d..1ed0c0a 100644
--- a/arch/arm/src/armv7-m/up_assert.c
+++ b/arch/arm/src/armv7-m/arm_assert.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_assert.c
+ * arch/arm/src/armv7-m/arm_assert.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_blocktask.c b/arch/arm/src/armv7-m/arm_blocktask.c
similarity index 99%
rename from arch/arm/src/armv7-m/up_blocktask.c
rename to arch/arm/src/armv7-m/arm_blocktask.c
index 66c4881..3de7b1e 100644
--- a/arch/arm/src/armv7-m/up_blocktask.c
+++ b/arch/arm/src/armv7-m/arm_blocktask.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_blocktask.c
+ * arch/arm/src/armv7-m/arm_blocktask.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_cache.c b/arch/arm/src/armv7-m/arm_cache.c
similarity index 99%
rename from arch/arm/src/armv7-m/up_cache.c
rename to arch/arm/src/armv7-m/arm_cache.c
index c7bdc19..6f99bca 100644
--- a/arch/arm/src/armv7-m/up_cache.c
+++ b/arch/arm/src/armv7-m/arm_cache.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_cache.c
+ * arch/arm/src/armv7-m/arm_cache.c
  *
  *   Copyright (C) 2015, 2018-2019 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/armv7-m/up_doirq.c b/arch/arm/src/armv7-m/arm_doirq.c
similarity index 98%
rename from arch/arm/src/armv7-m/up_doirq.c
rename to arch/arm/src/armv7-m/arm_doirq.c
index c40e16c..70d10ec 100644
--- a/arch/arm/src/armv7-m/up_doirq.c
+++ b/arch/arm/src/armv7-m/arm_doirq.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_doirq.c
+ * arch/arm/src/armv7-m/arm_doirq.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_hardfault.c b/arch/arm/src/armv7-m/arm_hardfault.c
similarity index 99%
rename from arch/arm/src/armv7-m/up_hardfault.c
rename to arch/arm/src/armv7-m/arm_hardfault.c
index 59b6bc3..06a4770 100644
--- a/arch/arm/src/armv7-m/up_hardfault.c
+++ b/arch/arm/src/armv7-m/arm_hardfault.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_hardfault.c
+ * arch/arm/src/armv7-m/arm_hardfault.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_initialstate.c b/arch/arm/src/armv7-m/arm_initialstate.c
similarity index 99%
rename from arch/arm/src/armv7-m/up_initialstate.c
rename to arch/arm/src/armv7-m/arm_initialstate.c
index 8b5263b..9276e15 100644
--- a/arch/arm/src/armv7-m/up_initialstate.c
+++ b/arch/arm/src/armv7-m/arm_initialstate.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_initialstate.c
+ * arch/arm/src/armv7-m/arm_initialstate.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_itm.c b/arch/arm/src/armv7-m/arm_itm.c
similarity index 99%
rename from arch/arm/src/armv7-m/up_itm.c
rename to arch/arm/src/armv7-m/arm_itm.c
index 5a62cdd..ddd9dd5 100644
--- a/arch/arm/src/armv7-m/up_itm.c
+++ b/arch/arm/src/armv7-m/arm_itm.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_itm.c
+ * arch/arm/src/armv7-m/arm_itm.c
  *
  *   Copyright (c) 2009 - 2013 ARM LIMITED
  *
diff --git a/arch/arm/src/armv7-m/up_itm_syslog.c b/arch/arm/src/armv7-m/arm_itm_syslog.c
similarity index 99%
rename from arch/arm/src/armv7-m/up_itm_syslog.c
rename to arch/arm/src/armv7-m/arm_itm_syslog.c
index 6d81d19..bb6916c 100644
--- a/arch/arm/src/armv7-m/up_itm_syslog.c
+++ b/arch/arm/src/armv7-m/arm_itm_syslog.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_itm_syslog.c
+ * arch/arm/src/armv7-m/arm_itm_syslog.c
  *
  *   Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
  *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
diff --git a/arch/arm/src/armv7-m/up_memfault.c b/arch/arm/src/armv7-m/arm_memfault.c
similarity index 98%
rename from arch/arm/src/armv7-m/up_memfault.c
rename to arch/arm/src/armv7-m/arm_memfault.c
index 9c0a536..918aa7e 100644
--- a/arch/arm/src/armv7-m/up_memfault.c
+++ b/arch/arm/src/armv7-m/arm_memfault.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_memfault.c
+ * arch/arm/src/armv7-m/arm_memfault.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_mpu.c b/arch/arm/src/armv7-m/arm_mpu.c
similarity index 99%
rename from arch/arm/src/armv7-m/up_mpu.c
rename to arch/arm/src/armv7-m/arm_mpu.c
index 0a67760..0585e47 100644
--- a/arch/arm/src/armv7-m/up_mpu.c
+++ b/arch/arm/src/armv7-m/arm_mpu.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- * arch/arm/src/armv7-m/up_mpu.c
+ * arch/arm/src/armv7-m/arm_mpu.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_ramvec_attach.c b/arch/arm/src/armv7-m/arm_ramvec_attach.c
similarity index 98%
rename from arch/arm/src/armv7-m/up_ramvec_attach.c
rename to arch/arm/src/armv7-m/arm_ramvec_attach.c
index d5d2939..a2caaab 100644
--- a/arch/arm/src/armv7-m/up_ramvec_attach.c
+++ b/arch/arm/src/armv7-m/arm_ramvec_attach.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/irq/up_ramvec_attach.c
+ * arch/arm/irq/arm_ramvec_attach.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_ramvec_initialize.c b/arch/arm/src/armv7-m/arm_ramvec_initialize.c
similarity index 99%
rename from arch/arm/src/armv7-m/up_ramvec_initialize.c
rename to arch/arm/src/armv7-m/arm_ramvec_initialize.c
index f4071dd..2dd26e9 100644
--- a/arch/arm/src/armv7-m/up_ramvec_initialize.c
+++ b/arch/arm/src/armv7-m/arm_ramvec_initialize.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_ramvec_initialize.c
+ * arch/arm/src/armv7-m/arm_ramvec_initialize.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_releasepending.c b/arch/arm/src/armv7-m/arm_releasepending.c
similarity index 98%
rename from arch/arm/src/armv7-m/up_releasepending.c
rename to arch/arm/src/armv7-m/arm_releasepending.c
index 45bcc7d..79f6245 100644
--- a/arch/arm/src/armv7-m/up_releasepending.c
+++ b/arch/arm/src/armv7-m/arm_releasepending.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/armv7-m/up_releasepending.c
+ *  arch/arm/src/armv7-m/arm_releasepending.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv6-m/up_reprioritizertr.c b/arch/arm/src/armv7-m/arm_reprioritizertr.c
similarity index 99%
rename from arch/arm/src/armv6-m/up_reprioritizertr.c
rename to arch/arm/src/armv7-m/arm_reprioritizertr.c
index 0c236ba..acf53d3 100644
--- a/arch/arm/src/armv6-m/up_reprioritizertr.c
+++ b/arch/arm/src/armv7-m/arm_reprioritizertr.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/armv6-m/up_reprioritizertr.c
+ *  arch/arm/src/armv7-m/arm_reprioritizertr.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_schedulesigaction.c b/arch/arm/src/armv7-m/arm_schedulesigaction.c
similarity index 99%
rename from arch/arm/src/armv7-m/up_schedulesigaction.c
rename to arch/arm/src/armv7-m/arm_schedulesigaction.c
index d19adda..2ec8d23 100644
--- a/arch/arm/src/armv7-m/up_schedulesigaction.c
+++ b/arch/arm/src/armv7-m/arm_schedulesigaction.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_schedulesigaction.c
+ * arch/arm/src/armv7-m/arm_schedulesigaction.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_sigdeliver.c b/arch/arm/src/armv7-m/arm_sigdeliver.c
similarity index 99%
rename from arch/arm/src/armv7-m/up_sigdeliver.c
rename to arch/arm/src/armv7-m/arm_sigdeliver.c
index 564ace6..f9f4a80 100644
--- a/arch/arm/src/armv7-m/up_sigdeliver.c
+++ b/arch/arm/src/armv7-m/arm_sigdeliver.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_sigdeliver.c
+ * arch/arm/src/armv7-m/arm_sigdeliver.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_signal_dispatch.c b/arch/arm/src/armv7-m/arm_signal_dispatch.c
similarity index 98%
rename from arch/arm/src/armv7-m/up_signal_dispatch.c
rename to arch/arm/src/armv7-m/arm_signal_dispatch.c
index e5acb37..01b4ea1 100644
--- a/arch/arm/src/armv7-m/up_signal_dispatch.c
+++ b/arch/arm/src/armv7-m/arm_signal_dispatch.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_signal_dispatch.c
+ * arch/arm/src/armv7-m/arm_signal_dispatch.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_stackcheck.c b/arch/arm/src/armv7-m/arm_stackcheck.c
similarity index 99%
rename from arch/arm/src/armv7-m/up_stackcheck.c
rename to arch/arm/src/armv7-m/arm_stackcheck.c
index f37b55c..8ee290a 100644
--- a/arch/arm/src/armv7-m/up_stackcheck.c
+++ b/arch/arm/src/armv7-m/arm_stackcheck.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_stackcheck.c
+ * arch/arm/src/armv7-m/arm_stackcheck.c
  *
  *   Copyright (c) 2013, 2014 PX4 Development Team. All rights reserved.
  *
diff --git a/arch/arm/src/armv7-m/up_svcall.c b/arch/arm/src/armv7-m/arm_svcall.c
similarity index 99%
rename from arch/arm/src/armv7-m/up_svcall.c
rename to arch/arm/src/armv7-m/arm_svcall.c
index 482f080..8dada8b 100644
--- a/arch/arm/src/armv7-m/up_svcall.c
+++ b/arch/arm/src/armv7-m/arm_svcall.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_svcall.c
+ * arch/arm/src/armv7-m/arm_svcall.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_systemreset.c b/arch/arm/src/armv7-m/arm_systemreset.c
similarity index 98%
rename from arch/arm/src/armv7-m/up_systemreset.c
rename to arch/arm/src/armv7-m/arm_systemreset.c
index 956d491..288420b 100644
--- a/arch/arm/src/armv7-m/up_systemreset.c
+++ b/arch/arm/src/armv7-m/arm_systemreset.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_systemreset.c
+ * arch/arm/src/armv7-m/arm_systemreset.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_systick.c b/arch/arm/src/armv7-m/arm_systick.c
similarity index 99%
rename from arch/arm/src/armv7-m/up_systick.c
rename to arch/arm/src/armv7-m/arm_systick.c
index 6a18667..6a6e22c 100644
--- a/arch/arm/src/armv7-m/up_systick.c
+++ b/arch/arm/src/armv7-m/arm_systick.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_systick.c
+ * arch/arm/src/armv7-m/arm_systick.c
  *
  *   Copyright (C) 2018 Pinecone Inc. All rights reserved.
  *   Author: Xiang Xiao <xiaoxiang@pinecone.net>
diff --git a/arch/arm/src/armv7-m/up_trigger_irq.c b/arch/arm/src/armv7-m/arm_trigger_irq.c
similarity index 98%
rename from arch/arm/src/armv7-m/up_trigger_irq.c
rename to arch/arm/src/armv7-m/arm_trigger_irq.c
index 6581d64..6d306a0 100644
--- a/arch/arm/src/armv7-m/up_trigger_irq.c
+++ b/arch/arm/src/armv7-m/arm_trigger_irq.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/irq/up_trigger_irq.c
+ * arch/arm/irq/arm_trigger_irq.c
  *
  *   Copyright (C) 2018 Pinecone Inc. All rights reserved.
  *   Author: Xiang Xiao <xiaoxiang@pinecone.net>
diff --git a/arch/arm/src/armv7-m/up_unblocktask.c b/arch/arm/src/armv7-m/arm_unblocktask.c
similarity index 98%
rename from arch/arm/src/armv7-m/up_unblocktask.c
rename to arch/arm/src/armv7-m/arm_unblocktask.c
index 19a58b8..f6c0d0f 100644
--- a/arch/arm/src/armv7-m/up_unblocktask.c
+++ b/arch/arm/src/armv7-m/arm_unblocktask.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/armv7-m/up_unblocktask.c
+ *  arch/arm/src/armv7-m/arm_unblocktask.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/armv7-m/up_vectors.c b/arch/arm/src/armv7-m/arm_vectors.c
similarity index 98%
rename from arch/arm/src/armv7-m/up_vectors.c
rename to arch/arm/src/armv7-m/arm_vectors.c
index 3644154..600dee5 100644
--- a/arch/arm/src/armv7-m/up_vectors.c
+++ b/arch/arm/src/armv7-m/arm_vectors.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_vectors.c
+ * arch/arm/src/armv7-m/arm_vectors.c
  *
  *   Copyright (C) 2012 Michael Smith. All rights reserved.
  *
diff --git a/arch/arm/src/armv7-r/arm_blocktask.c b/arch/arm/src/armv7-r/arm_blocktask.c
index 84fafd6..da7f20a 100644
--- a/arch/arm/src/armv7-r/arm_blocktask.c
+++ b/arch/arm/src/armv7-r/arm_blocktask.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/armv7-r/up_blocktask.c
+ * arch/arm/src/armv7-r/arm_blocktask.c
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/armv7-a/arm_vfork.S b/arch/arm/src/armv7-r/vfork.S
similarity index 70%
rename from arch/arm/src/armv7-a/arm_vfork.S
rename to arch/arm/src/armv7-r/vfork.S
index 8227899..f49bfef 100644
--- a/arch/arm/src/armv7-a/arm_vfork.S
+++ b/arch/arm/src/armv7-r/vfork.S
@@ -1,35 +1,20 @@
 /****************************************************************************
- * arch/arm/src/armv7-a/arm_vfork.S
+ * arch/arm/src/armv7-r/vfork.S
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt <gnutt@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ *   http://www.apache.org/licenses/LICENSE-2.0
  *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
  *
  ****************************************************************************/
 
diff --git a/arch/arm/src/c5471/Make.defs b/arch/arm/src/c5471/Make.defs
index 263e44e..a3eca41 100644
--- a/arch/arm/src/c5471/Make.defs
+++ b/arch/arm/src/c5471/Make.defs
@@ -37,20 +37,20 @@ HEAD_ASRC = up_nommuhead.S
 
 CMN_ASRCS  = arm_saveusercontext.S arm_fullcontextrestore.S vfork.S
 
-CMN_CSRCS  = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_dataabort.c up_mdelay.c up_udelay.c up_doirq.c
-CMN_CSRCS += up_exit.c up_initialize.c up_initialstate.c up_interruptcontext.c
-CMN_CSRCS += up_prefetchabort.c up_releasepending.c up_releasestack.c
-CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c up_sigdeliver.c
-CMN_CSRCS += up_stackframe.c up_syscall.c up_unblocktask.c up_undefinedinsn.c
-CMN_CSRCS += up_usestack.c up_vfork.c
+CMN_CSRCS  = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
+CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c arm_doirq.c
+CMN_CSRCS += arm_exit.c arm_initialize.c arm_initialstate.c arm_interruptcontext.c
+CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c
+CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c
+CMN_CSRCS += arm_stackframe.c arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c
+CMN_CSRCS += arm_usestack.c arm_vfork.c
 
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
-CMN_CSRCS += up_idle.c
+CMN_CSRCS += arm_idle.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 CHIP_ASRCS = c5471_lowputc.S c5471_vectors.S
diff --git a/arch/arm/src/common/README_lwl_console.txt b/arch/arm/src/common/README_lwl_console.txt
index 3e2cd3d..266cd4f 100644
--- a/arch/arm/src/common/README_lwl_console.txt
+++ b/arch/arm/src/common/README_lwl_console.txt
@@ -1,4 +1,4 @@
-The file up_lwl_console.c implements a 'Lightweight Link' protocol between
+The file arm_lwl_console.c implements a 'Lightweight Link' protocol between
 a target and debugger for use when you need a console but the target doesn't
 have a spare serial port or other available resource. This implements a
 new console type which uses two words of memory for data exchange.
diff --git a/arch/arm/src/common/up_allocateheap.c b/arch/arm/src/common/arm_allocateheap.c
similarity index 99%
rename from arch/arm/src/common/up_allocateheap.c
rename to arch/arm/src/common/arm_allocateheap.c
index b4aa3d0..13823f2 100644
--- a/arch/arm/src/common/up_allocateheap.c
+++ b/arch/arm/src/common/arm_allocateheap.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_allocateheap.c
+ * arch/arm/src/common/arm_allocateheap.c
  *
  *   Copyright (C) 2007, 2008, 2014-2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_checkstack.c b/arch/arm/src/common/arm_checkstack.c
similarity index 99%
rename from arch/arm/src/common/up_checkstack.c
rename to arch/arm/src/common/arm_checkstack.c
index 551de9c..0d7569d 100644
--- a/arch/arm/src/common/up_checkstack.c
+++ b/arch/arm/src/common/arm_checkstack.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_checkstack.c
+ * arch/arm/src/common/arm_checkstack.c
  *
  *   Copyright (C) 2011, 2013, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_createstack.c b/arch/arm/src/common/arm_createstack.c
similarity index 99%
rename from arch/arm/src/common/up_createstack.c
rename to arch/arm/src/common/arm_createstack.c
index 9ed678f..1345300 100644
--- a/arch/arm/src/common/up_createstack.c
+++ b/arch/arm/src/common/arm_createstack.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_createstack.c
+ * arch/arm/src/common/arm_createstack.c
  *
  *   Copyright (C) 2007-2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_etherstub.c b/arch/arm/src/common/arm_etherstub.c
similarity index 98%
rename from arch/arm/src/common/up_etherstub.c
rename to arch/arm/src/common/arm_etherstub.c
index e0fd180..0cb5e0c 100644
--- a/arch/arm/src/common/up_etherstub.c
+++ b/arch/arm/src/common/arm_etherstub.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_etherstub.c
+ * arch/arm/src/common/arm_etherstub.c
  *
  *   Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_exit.c b/arch/arm/src/common/arm_exit.c
similarity index 99%
rename from arch/arm/src/common/up_exit.c
rename to arch/arm/src/common/arm_exit.c
index 8354675..12df324 100644
--- a/arch/arm/src/common/up_exit.c
+++ b/arch/arm/src/common/arm_exit.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_exit.c
+ * common/arm_exit.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/arch/arm/src/common/up_hostfs.c b/arch/arm/src/common/arm_hostfs.c
similarity index 99%
rename from arch/arm/src/common/up_hostfs.c
rename to arch/arm/src/common/arm_hostfs.c
index 3b86f21..f6415a2 100644
--- a/arch/arm/src/common/up_hostfs.c
+++ b/arch/arm/src/common/arm_hostfs.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_hostfs.c
+ * arch/arm/src/common/arm_hostfs.c
  *
  *   Copyright (C) 2018 Pinecone Inc. All rights reserved.
  *   Author: Xiang Xiao <xiaoxiang@pinecone.net>
diff --git a/arch/arm/src/common/up_idle.c b/arch/arm/src/common/arm_idle.c
similarity index 98%
rename from arch/arm/src/common/up_idle.c
rename to arch/arm/src/common/arm_idle.c
index 45fab0b..a9bdfb2 100644
--- a/arch/arm/src/common/up_idle.c
+++ b/arch/arm/src/common/arm_idle.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/common/up_idle.c
+ *  arch/arm/src/common/arm_idle.c
  *
  *   Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_initialize.c b/arch/arm/src/common/arm_initialize.c
similarity index 77%
rename from arch/arm/src/common/up_initialize.c
rename to arch/arm/src/common/arm_initialize.c
index 6361614..27f8ce4 100644
--- a/arch/arm/src/common/up_initialize.c
+++ b/arch/arm/src/common/arm_initialize.c
@@ -1,35 +1,20 @@
 /****************************************************************************
- * arch/arm/src/common/up_initialize.c
+ * arch/arm/src/common/arm_initialize.c
  *
- *   Copyright (C) 2007-2010, 2012-2017 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt <gnutt@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ *   http://www.apache.org/licenses/LICENSE-2.0
  *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
  *
  ****************************************************************************/
 
diff --git a/arch/arm/src/common/up_interruptcontext.c b/arch/arm/src/common/arm_interruptcontext.c
similarity index 98%
rename from arch/arm/src/common/up_interruptcontext.c
rename to arch/arm/src/common/arm_interruptcontext.c
index e41d307..d7bbd67 100644
--- a/arch/arm/src/common/up_interruptcontext.c
+++ b/arch/arm/src/common/arm_interruptcontext.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/common/up_interruptcontext.c
+ *  arch/arm/src/common/arm_interruptcontext.c
  *
  *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_lowputs.c b/arch/arm/src/common/arm_lowputs.c
similarity index 98%
rename from arch/arm/src/common/up_lowputs.c
rename to arch/arm/src/common/arm_lowputs.c
index fde555e..9d25b1a 100644
--- a/arch/arm/src/common/up_lowputs.c
+++ b/arch/arm/src/common/arm_lowputs.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_lowputs.c
+ * arch/arm/src/common/arm_lowputs.c
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_lwl_console.c b/arch/arm/src/common/arm_lwl_console.c
similarity index 100%
rename from arch/arm/src/common/up_lwl_console.c
rename to arch/arm/src/common/arm_lwl_console.c
diff --git a/arch/arm/src/common/up_mdelay.c b/arch/arm/src/common/arm_mdelay.c
similarity index 98%
rename from arch/arm/src/common/up_mdelay.c
rename to arch/arm/src/common/arm_mdelay.c
index 94285ea..6979e23 100644
--- a/arch/arm/src/common/up_mdelay.c
+++ b/arch/arm/src/common/arm_mdelay.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/common/up_mdelay.c
+ *  arch/arm/src/common/arm_mdelay.c
  *
  *   Copyright (C) 2007, 2008, 2014 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_modifyreg16.c b/arch/arm/src/common/arm_modifyreg16.c
similarity index 98%
rename from arch/arm/src/common/up_modifyreg16.c
rename to arch/arm/src/common/arm_modifyreg16.c
index 7967320..6292cf2 100644
--- a/arch/arm/src/common/up_modifyreg16.c
+++ b/arch/arm/src/common/arm_modifyreg16.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_modifyreg16.c
+ * arch/arm/src/common/arm_modifyreg16.c
  *
  *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_modifyreg32.c b/arch/arm/src/common/arm_modifyreg32.c
similarity index 98%
rename from arch/arm/src/common/up_modifyreg32.c
rename to arch/arm/src/common/arm_modifyreg32.c
index c49cdfa..9e51e97 100644
--- a/arch/arm/src/common/up_modifyreg32.c
+++ b/arch/arm/src/common/arm_modifyreg32.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_modifyreg32.c
+ * arch/arm/src/common/arm_modifyreg32.c
  *
  *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_modifyreg8.c b/arch/arm/src/common/arm_modifyreg8.c
similarity index 98%
rename from arch/arm/src/common/up_modifyreg8.c
rename to arch/arm/src/common/arm_modifyreg8.c
index b67cbdc..796b049 100644
--- a/arch/arm/src/common/up_modifyreg8.c
+++ b/arch/arm/src/common/arm_modifyreg8.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_modifyreg8.c
+ * arch/arm/src/common/arm_modifyreg8.c
  *
  *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_pthread_start.c b/arch/arm/src/common/arm_pthread_start.c
similarity index 98%
rename from arch/arm/src/common/up_pthread_start.c
rename to arch/arm/src/common/arm_pthread_start.c
index f8988da..5ca180d 100644
--- a/arch/arm/src/common/up_pthread_start.c
+++ b/arch/arm/src/common/arm_pthread_start.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_pthread_start.c
+ * arch/arm/src/common/arm_pthread_start.c
  *
  *   Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_puts.c b/arch/arm/src/common/arm_puts.c
similarity index 98%
rename from arch/arm/src/common/up_puts.c
rename to arch/arm/src/common/arm_puts.c
index 9b64f9e..658980e 100644
--- a/arch/arm/src/common/up_puts.c
+++ b/arch/arm/src/common/arm_puts.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_puts.c
+ * arch/arm/src/common/arm_puts.c
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_releasestack.c b/arch/arm/src/common/arm_releasestack.c
similarity index 99%
rename from arch/arm/src/common/up_releasestack.c
rename to arch/arm/src/common/arm_releasestack.c
index 5588e42..ba620db 100644
--- a/arch/arm/src/common/up_releasestack.c
+++ b/arch/arm/src/common/arm_releasestack.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/common/up_releasestack.c
+ *  arch/arm/src/common/arm_releasestack.c
  *
  *   Copyright (C) 2007-2009, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_semi_syslog.c b/arch/arm/src/common/arm_semi_syslog.c
similarity index 98%
rename from arch/arm/src/common/up_semi_syslog.c
rename to arch/arm/src/common/arm_semi_syslog.c
index dc66003..33261f6 100644
--- a/arch/arm/src/common/up_semi_syslog.c
+++ b/arch/arm/src/common/arm_semi_syslog.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_semi_syslog.c
+ * arch/arm/src/common/arm_semi_syslog.c
  *
  *   Copyright (C) 2018 Pinecone Inc. All rights reserved.
  *   Author: Xiang Xiao <xiaoxiang@pinecone.net>
diff --git a/arch/arm/src/common/up_stackframe.c b/arch/arm/src/common/arm_stackframe.c
similarity index 99%
rename from arch/arm/src/common/up_stackframe.c
rename to arch/arm/src/common/arm_stackframe.c
index c3a1f05..7f8fa91 100644
--- a/arch/arm/src/common/up_stackframe.c
+++ b/arch/arm/src/common/arm_stackframe.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_stackframe.c
+ * arch/arm/src/common/arm_stackframe.c
  *
  *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_task_start.c b/arch/arm/src/common/arm_task_start.c
similarity index 98%
rename from arch/arm/src/common/up_task_start.c
rename to arch/arm/src/common/arm_task_start.c
index 3662246..eeff19a 100644
--- a/arch/arm/src/common/up_task_start.c
+++ b/arch/arm/src/common/arm_task_start.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_task_start.c
+ * arch/arm/src/common/arm_task_start.c
  *
  *   Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_udelay.c b/arch/arm/src/common/arm_udelay.c
similarity index 99%
rename from arch/arm/src/common/up_udelay.c
rename to arch/arm/src/common/arm_udelay.c
index 9e3115b..2adfabb 100644
--- a/arch/arm/src/common/up_udelay.c
+++ b/arch/arm/src/common/arm_udelay.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/arm/src/common/up_udelay.c
+ *  arch/arm/src/common/arm_udelay.c
  *
  *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_usestack.c b/arch/arm/src/common/arm_usestack.c
similarity index 99%
rename from arch/arm/src/common/up_usestack.c
rename to arch/arm/src/common/arm_usestack.c
index 7748fbd..67886bc 100644
--- a/arch/arm/src/common/up_usestack.c
+++ b/arch/arm/src/common/arm_usestack.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_usestack.c
+ * arch/arm/src/common/arm_usestack.c
  *
  *   Copyright (C) 2007-2009, 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_vfork.c b/arch/arm/src/common/arm_vfork.c
similarity index 99%
rename from arch/arm/src/common/up_vfork.c
rename to arch/arm/src/common/arm_vfork.c
index 4707f31..50c3ae8 100644
--- a/arch/arm/src/common/up_vfork.c
+++ b/arch/arm/src/common/arm_vfork.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_vfork.c
+ * arch/arm/src/common/arm_vfork.c
  *
  *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/common/up_internal.h b/arch/arm/src/common/up_internal.h
index 4dd9861..cbc9760 100644
--- a/arch/arm/src/common/up_internal.h
+++ b/arch/arm/src/common/up_internal.h
@@ -429,7 +429,7 @@ void rpmsg_serialinit(void);
 #endif
 
 #ifdef CONFIG_ARM_LWL_CONSOLE
-/* Defined in src/common/up_lwl_console.c */
+/* Defined in src/common/arm_lwl_console.c */
 
 void lwlconsole_init(void);
 #endif
@@ -464,10 +464,10 @@ void up_wdtinit(void);
 
 /* Defined in board/xyz_network.c for board-specific Ethernet
  * implementations, or chip/xyx_ethernet.c for chip-specific Ethernet
- * implementations, or common/up_etherstub.c for a corner case where the
+ * implementations, or common/arm_etherstub.c for a corner case where the
  * network is enabled yet there is no Ethernet driver to be initialized.
  *
- * Use of common/up_etherstub.c is deprecated.  The preferred mechanism is to
+ * Use of common/arm_etherstub.c is deprecated.  The preferred mechanism is to
  * use CONFIG_NETDEV_LATEINIT=y to suppress the call to up_netinitialize() in
  * up_initialize().  Then this stub would not be needed.
  */
diff --git a/arch/arm/src/cxd56xx/Make.defs b/arch/arm/src/cxd56xx/Make.defs
index f5817f1..61c8d34 100644
--- a/arch/arm/src/cxd56xx/Make.defs
+++ b/arch/arm/src/cxd56xx/Make.defs
@@ -46,24 +46,24 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
-CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
-CMN_CSRCS += up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
-CMN_CSRCS += up_unblocktask.c up_usestack.c up_doirq.c up_hardfault.c
-CMN_CSRCS += up_svcall.c up_vfork.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c
+CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
+CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
+CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
+CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
+CMN_CSRCS += arm_svcall.c arm_vfork.c
 
 ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
 CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_ARCH_MEMCPY),y)
@@ -71,13 +71,13 @@ CMN_ASRCS += up_memcpy.S
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_mpu.c arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
@@ -90,7 +90,7 @@ endif
 endif
 
 ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
-CMN_CSRCS += up_itm_syslog.c
+CMN_CSRCS += arm_itm_syslog.c
 endif
 
 CHIP_ASRCS += cxd56_farapistub.S
diff --git a/arch/arm/src/dm320/Make.defs b/arch/arm/src/dm320/Make.defs
index 8b8cf64..2de2995 100644
--- a/arch/arm/src/dm320/Make.defs
+++ b/arch/arm/src/dm320/Make.defs
@@ -38,20 +38,20 @@ HEAD_ASRC = up_head.S
 CMN_ASRCS  = up_cache.S arm_fullcontextrestore.S arm_saveusercontext.S
 CMN_ASRCS += up_vectors.S up_vectoraddrexcptn.S up_vectortab.S vfork.S
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_dataabort.c up_mdelay.c up_udelay.c up_exit.c
-CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
-CMN_CSRCS += up_prefetchabort.c up_releasepending.c up_releasestack.c
-CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c
-CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_syscall.c up_unblocktask.c
-CMN_CSRCS += up_undefinedinsn.c up_usestack.c up_vfork.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_dataabort.c arm_mdelay.c arm_udelay.c arm_exit.c
+CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
+CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c
+CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c
+CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_syscall.c arm_unblocktask.c
+CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c
 
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
-CMN_CSRCS += up_idle.c
+CMN_CSRCS += arm_idle.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 CHIP_ASRCS  = dm320_lowputc.S dm320_restart.S
diff --git a/arch/arm/src/efm32/Make.defs b/arch/arm/src/efm32/Make.defs
index a4b7fa3..eb2c745 100644
--- a/arch/arm/src/efm32/Make.defs
+++ b/arch/arm/src/efm32/Make.defs
@@ -47,34 +47,34 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_doirq.c up_exit.c up_hardfault.c
-CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
-CMN_CSRCS += up_itm.c up_mdelay.c up_memfault.c up_modifyreg8.c
-CMN_CSRCS += up_modifyreg16.c up_modifyreg32.c up_releasepending.c
-CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c
-CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_svcall.c up_systemreset.c
-CMN_CSRCS += up_trigger_irq.c up_udelay.c up_unblocktask.c up_usestack.c up_vfork.c
+CMN_CSRCS  = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
+CMN_CSRCS += arm_createstack.c arm_doirq.c arm_exit.c arm_hardfault.c
+CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
+CMN_CSRCS += arm_itm.c arm_mdelay.c arm_memfault.c arm_modifyreg8.c
+CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
+CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
+CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c
+CMN_CSRCS += arm_trigger_irq.c arm_udelay.c arm_unblocktask.c arm_usestack.c arm_vfork.c
 
 ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
 CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_mpu.c arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
@@ -83,7 +83,7 @@ CMN_CSRCS += arm_copyarmstate.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
-CMN_CSRCS += up_itm_syslog.c
+CMN_CSRCS += arm_itm_syslog.c
 endif
 
 CHIP_ASRCS  =
diff --git a/arch/arm/src/imx1/Make.defs b/arch/arm/src/imx1/Make.defs
index 05fb268..de867fb 100644
--- a/arch/arm/src/imx1/Make.defs
+++ b/arch/arm/src/imx1/Make.defs
@@ -37,20 +37,20 @@ HEAD_ASRC = up_head.S
 
 CMN_ASRCS  = up_cache.S arm_fullcontextrestore.S arm_saveusercontext.S
 CMN_ASRCS += up_vectors.S up_vectoraddrexcptn.S up_vectortab.S vfork.S
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_dataabort.c up_mdelay.c up_udelay.c up_exit.c
-CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
-CMN_CSRCS += up_prefetchabort.c up_releasepending.c up_releasestack.c
-CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c
-CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_syscall.c up_unblocktask.c
-CMN_CSRCS += up_undefinedinsn.c up_usestack.c up_vfork.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_dataabort.c arm_mdelay.c arm_udelay.c arm_exit.c
+CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
+CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c
+CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c
+CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_syscall.c arm_unblocktask.c
+CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c
 
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
-CMN_CSRCS += up_idle.c
+CMN_CSRCS += arm_idle.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 CHIP_ASRCS  = imx_lowputc.S
diff --git a/arch/arm/src/imx6/Make.defs b/arch/arm/src/imx6/Make.defs
index ad28670..bcd54ff 100644
--- a/arch/arm/src/imx6/Make.defs
+++ b/arch/arm/src/imx6/Make.defs
@@ -4,32 +4,20 @@
 #   Copyright (C) 2016, 2018 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
 #
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name Gregory Nutt nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
+#   http://www.apache.org/licenses/LICENSE-2.0
 #
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
 #
 ############################################################################
 
@@ -57,17 +45,17 @@ endif
 # Common assembly language files
 
 CMN_ASRCS += arm_vectors.S arm_fpuconfig.S arm_fullcontextrestore.S
-CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S arm_vfork.S
-CMN_ASRCS += arm_testset.S arm_fetchadd.S
+CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S
+CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
 CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
 CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
 
 # Common C source files
 
-CMN_CSRCS  = up_initialize.c up_interruptcontext.c up_exit.c up_createstack.c
-CMN_CSRCS += up_releasestack.c up_usestack.c up_vfork.c up_puts.c up_mdelay.c
-CMN_CSRCS += up_stackframe.c up_udelay.c up_modifyreg8.c up_modifyreg16.c
-CMN_CSRCS += up_modifyreg32.c
+CMN_CSRCS  = arm_initialize.c arm_interruptcontext.c arm_exit.c arm_createstack.c
+CMN_CSRCS += arm_releasestack.c arm_usestack.c arm_vfork.c arm_puts.c arm_mdelay.c
+CMN_CSRCS += arm_stackframe.c arm_udelay.c arm_modifyreg8.c arm_modifyreg16.c
+CMN_CSRCS += arm_modifyreg32.c
 
 CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
 CMN_CSRCS += arm_doirq.c arm_gicv2.c arm_initialstate.c arm_mmu.c
@@ -76,7 +64,7 @@ CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
 CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
 
 ifeq ($(CONFIG_ARM_SEMIHOSTING_HOSTFS),y)
-CMN_CSRCS += up_hostfs.c
+CMN_CSRCS += arm_hostfs.c
 endif
 
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
@@ -94,7 +82,7 @@ endif
 
 # Use common heap allocation for now (may need to be customized later)
 
-CMN_CSRCS += up_allocateheap.c
+CMN_CSRCS += arm_allocateheap.c
 
 # Configuration dependent C and assembly language files
 
@@ -104,7 +92,7 @@ CMN_CSRCS += arm_va2pte.c
 endif
 
 ifeq ($(CONFIG_BUILD_KERNEL),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c arm_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c arm_signal_dispatch.c
 endif
 
 ifeq ($(CONFIG_ARCH_ADDRENV),y)
@@ -135,7 +123,7 @@ CMN_CSRCS += arm_copyarmstate.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 # i.MX6-specific assembly language files
diff --git a/arch/arm/src/imxrt/Make.defs b/arch/arm/src/imxrt/Make.defs
index 99d5651..467ba8e 100644
--- a/arch/arm/src/imxrt/Make.defs
+++ b/arch/arm/src/imxrt/Make.defs
@@ -47,17 +47,17 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
-CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
-CMN_CSRCS += up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
-CMN_CSRCS += up_unblocktask.c up_usestack.c up_doirq.c up_hardfault.c
-CMN_CSRCS += up_svcall.c up_vfork.c up_trigger_irq.c up_systemreset.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c
+CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
+CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
+CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
+CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
+CMN_CSRCS += arm_svcall.c arm_vfork.c arm_trigger_irq.c arm_systemreset.c
 
 ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
-CMN_CSRCS += up_stackcheck.c
+CMN_CSRCS += arm_stackcheck.c
 endif
 
 # Configuration-dependent common files
@@ -67,27 +67,27 @@ CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_ARM_MPU),y)
-CMN_CSRCS += up_mpu.c
+CMN_CSRCS += arm_mpu.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
-CMN_CSRCS += up_cache.c
+CMN_CSRCS += arm_cache.c
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += up_fpu.S
diff --git a/arch/arm/src/kinetis/Make.defs b/arch/arm/src/kinetis/Make.defs
index 349b4ed..b62dad8 100644
--- a/arch/arm/src/kinetis/Make.defs
+++ b/arch/arm/src/kinetis/Make.defs
@@ -47,17 +47,17 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_mdelay.c up_udelay.c up_exit.c up_initialize.c up_memfault.c
-CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_modifyreg8.c
-CMN_CSRCS += up_modifyreg16.c up_modifyreg32.c up_releasestack.c
-CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c up_releasepending.c
-CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_unblocktask.c up_usestack.c
-CMN_CSRCS += up_doirq.c up_hardfault.c up_svcall.c up_vfork.c
-CMN_CSRCS += up_systemreset.c up_trigger_irq.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_mdelay.c arm_udelay.c arm_exit.c arm_initialize.c arm_memfault.c
+CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_modifyreg8.c
+CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasestack.c
+CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_releasepending.c
+CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_unblocktask.c arm_usestack.c
+CMN_CSRCS += arm_doirq.c arm_hardfault.c arm_svcall.c arm_vfork.c
+CMN_CSRCS += arm_systemreset.c arm_trigger_irq.c
 
 ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
-CMN_CSRCS += up_stackcheck.c
+CMN_CSRCS += arm_stackcheck.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
@@ -65,33 +65,33 @@ CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_ARM_MPU),y)
-CMN_CSRCS += up_mpu.c
+CMN_CSRCS += arm_mpu.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
-# Use of common/up_etherstub.c is deprecated.  The preferred mechanism is to
+# Use of common/arm_etherstub.c is deprecated.  The preferred mechanism is to
 # use CONFIG_NETDEV_LATEINIT=y to suppress the call to up_netinitialize() in
 # up_initialize().  Then this stub would not be needed.
 
 ifeq ($(CONFIG_NET),y)
 ifneq ($(CONFIG_KINETIS_ENET),y)
-CMN_CSRCS += up_etherstub.c
+CMN_CSRCS += arm_etherstub.c
 endif
 endif
 
@@ -101,7 +101,7 @@ CMN_CSRCS += arm_copyarmstate.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
-CMN_CSRCS += up_itm_syslog.c
+CMN_CSRCS += arm_itm_syslog.c
 endif
 
 # Required Kinetis files
diff --git a/arch/arm/src/kl/Make.defs b/arch/arm/src/kl/Make.defs
index c8e3385..33ef8d4 100644
--- a/arch/arm/src/kl/Make.defs
+++ b/arch/arm/src/kl/Make.defs
@@ -38,27 +38,27 @@ HEAD_ASRC =
 CMN_ASRCS  = up_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
 CMN_ASRCS += arm_switchcontext.S vfork.S
 
-CMN_CSRCS  = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
-CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
-CMN_CSRCS += up_puts.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
-CMN_CSRCS += up_systemreset.c up_unblocktask.c up_usestack.c up_doirq.c
-CMN_CSRCS += up_hardfault.c up_svcall.c up_vectors.c up_vfork.c
+CMN_CSRCS  = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
+CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
+CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
+CMN_CSRCS += arm_puts.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
+CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
+CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 ifeq ($(CONFIG_DEBUG_FEATURES),y)
-CMN_CSRCS += up_dumpnvic.c
+CMN_CSRCS += arm_dumpnvic.c
 endif
 
 CHIP_ASRCS  =
diff --git a/arch/arm/src/lc823450/Make.defs b/arch/arm/src/lc823450/Make.defs
index b1ad5f9..9a4c477 100644
--- a/arch/arm/src/lc823450/Make.defs
+++ b/arch/arm/src/lc823450/Make.defs
@@ -49,28 +49,28 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
-CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
-CMN_CSRCS += up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_systemreset.c
-CMN_CSRCS += up_unblocktask.c up_usestack.c up_doirq.c up_hardfault.c
-CMN_CSRCS += up_svcall.c up_vfork.c up_trigger_irq.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c
+CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
+CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
+CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_systemreset.c
+CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
+CMN_CSRCS += arm_svcall.c arm_vfork.c arm_trigger_irq.c
 
 # CMN_CSRCS += up_dwt.c
 
-CMN_CSRCS += up_stackframe.c
+CMN_CSRCS += arm_stackframe.c
 CMN_ASRCS += up_exception.S
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
@@ -83,7 +83,7 @@ CMN_CSRCS += up_memmove.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 CHIP_ASRCS  =
@@ -183,6 +183,6 @@ CHIP_CSRCS += lc823450_userspace.c
 endif
 
 ifeq ($(CONFIG_ARM_MPU),y)
-CMN_CSRCS  += up_mpu.c
+CMN_CSRCS  += arm_mpu.c
 CHIP_CSRCS += lc823450_mpuinit2.c
 endif
diff --git a/arch/arm/src/lpc17xx_40xx/Make.defs b/arch/arm/src/lpc17xx_40xx/Make.defs
index aa6a02a..a1d3e46 100644
--- a/arch/arm/src/lpc17xx_40xx/Make.defs
+++ b/arch/arm/src/lpc17xx_40xx/Make.defs
@@ -51,18 +51,18 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_mdelay.c up_udelay.c up_exit.c up_initialize.c up_memfault.c
-CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_modifyreg8.c
-CMN_CSRCS += up_modifyreg16.c up_modifyreg32.c up_releasepending.c
-CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c
-CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_trigger_irq.c
-CMN_CSRCS += up_unblocktask.c up_usestack.c up_doirq.c up_hardfault.c
-CMN_CSRCS += up_svcall.c up_checkstack.c up_vfork.c
-CMN_CSRCS += up_systemreset.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_mdelay.c arm_udelay.c arm_exit.c arm_initialize.c arm_memfault.c
+CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_modifyreg8.c
+CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
+CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
+CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_trigger_irq.c
+CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
+CMN_CSRCS += arm_svcall.c arm_checkstack.c arm_vfork.c
+CMN_CSRCS += arm_systemreset.c
 
 ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
-CMN_CSRCS += up_stackcheck.c
+CMN_CSRCS += arm_stackcheck.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
@@ -70,29 +70,29 @@ CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_ARM_MPU),y)
-CMN_CSRCS += up_mpu.c
+CMN_CSRCS += arm_mpu.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
-# Use of common/up_etherstub.c is deprecated.  The preferred mechanism is to
+# Use of common/arm_etherstub.c is deprecated.  The preferred mechanism is to
 # use CONFIG_NETDEV_LATEINIT=y to suppress the call to up_netinitialize() in
 # up_initialize().  Then this stub would not be needed.
 
 ifeq ($(CONFIG_NET),y)
 ifneq ($(CONFIG_LPC17_40_ETHERNET),y)
-CMN_CSRCS += up_etherstub.c
+CMN_CSRCS += arm_etherstub.c
 endif
 endif
 
diff --git a/arch/arm/src/lpc214x/Make.defs b/arch/arm/src/lpc214x/Make.defs
index 2ba1a75..4851b20 100644
--- a/arch/arm/src/lpc214x/Make.defs
+++ b/arch/arm/src/lpc214x/Make.defs
@@ -39,21 +39,21 @@ HEAD_ASRC = lpc214x_head.S
 CMN_ASRCS  = arm_saveusercontext.S arm_fullcontextrestore.S up_vectors.S
 CMN_ASRCS += vfork.S
 
-CMN_CSRCS  = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_dataabort.c up_mdelay.c up_udelay.c
-CMN_CSRCS += up_exit.c up_initialize.c up_initialstate.c
-CMN_CSRCS += up_interruptcontext.c up_prefetchabort.c up_releasepending.c
-CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_stackframe.c
-CMN_CSRCS += up_syscall.c up_unblocktask.c up_undefinedinsn.c up_usestack.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c
-CMN_CSRCS += up_lowputs.c up_vfork.c
+CMN_CSRCS  = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
+CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c
+CMN_CSRCS += arm_exit.c arm_initialize.c arm_initialstate.c
+CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c
+CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_stackframe.c
+CMN_CSRCS += arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c arm_usestack.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
+CMN_CSRCS += arm_lowputs.c arm_vfork.c
 
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
-CMN_CSRCS += up_idle.c
+CMN_CSRCS += arm_idle.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 CHIP_ASRCS = lpc214x_lowputc.S
diff --git a/arch/arm/src/lpc2378/Make.defs b/arch/arm/src/lpc2378/Make.defs
index 6cc277d..2b64f2f 100644
--- a/arch/arm/src/lpc2378/Make.defs
+++ b/arch/arm/src/lpc2378/Make.defs
@@ -42,21 +42,21 @@ HEAD_ASRC = lpc23xx_head.S
 
 CMN_ASRCS  = arm_saveusercontext.S arm_fullcontextrestore.S up_vectors.S
 CMN_ASRCS += vfork.S
-CMN_CSRCS  = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_dataabort.c up_mdelay.c up_udelay.c
-CMN_CSRCS += up_exit.c up_initialize.c up_initialstate.c
-CMN_CSRCS += up_interruptcontext.c up_prefetchabort.c up_releasepending.c
-CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_stackframe.c
-CMN_CSRCS += up_syscall.c up_unblocktask.c up_undefinedinsn.c
-CMN_CSRCS += up_usestack.c up_lowputs.c up_vfork.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c
+CMN_CSRCS  = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
+CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c
+CMN_CSRCS += arm_exit.c arm_initialize.c arm_initialstate.c
+CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c
+CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_stackframe.c
+CMN_CSRCS += arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c
+CMN_CSRCS += arm_usestack.c arm_lowputs.c arm_vfork.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
 
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
-CMN_CSRCS += up_idle.c
+CMN_CSRCS += arm_idle.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 CHIP_ASRCS  = lpc23xx_lowputc.S
diff --git a/arch/arm/src/lpc31xx/Make.defs b/arch/arm/src/lpc31xx/Make.defs
index 7c1a021..edb7cfe 100644
--- a/arch/arm/src/lpc31xx/Make.defs
+++ b/arch/arm/src/lpc31xx/Make.defs
@@ -38,25 +38,25 @@ HEAD_ASRC = up_head.S
 CMN_ASRCS  = up_cache.S arm_fullcontextrestore.S arm_saveusercontext.S
 CMN_ASRCS += up_vectors.S up_vectoraddrexcptn.S up_vectortab.S vfork.S
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_dataabort.c up_mdelay.c up_udelay.c up_exit.c
-CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
-CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_prefetchabort.c up_releasepending.c up_releasestack.c
-CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c
-CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_syscall.c up_unblocktask.c
-CMN_CSRCS += up_undefinedinsn.c up_usestack.c up_vfork.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_dataabort.c arm_mdelay.c arm_udelay.c arm_exit.c
+CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
+CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c
+CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c
+CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_syscall.c arm_unblocktask.c
+CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c
 
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
-CMN_CSRCS += up_idle.c
+CMN_CSRCS += arm_idle.c
 endif
 
 ifeq ($(CONFIG_PAGING),y)
-CMN_CSRCS += up_pginitialize.c up_checkmapping.c up_allocpage.c up_va2pte.c
+CMN_CSRCS += arm_pginitialize.c arm_checkmapping.c arm_allocpage.c arm_va2pte.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 CGU_ASRCS  =
diff --git a/arch/arm/src/lpc43xx/Make.defs b/arch/arm/src/lpc43xx/Make.defs
index 7dc664d..69236db 100644
--- a/arch/arm/src/lpc43xx/Make.defs
+++ b/arch/arm/src/lpc43xx/Make.defs
@@ -44,38 +44,38 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_doirq.c up_exit.c up_hardfault.c up_initialize.c
-CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_mdelay.c
-CMN_CSRCS += up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
-CMN_CSRCS += up_svcall.c up_trigger_irq.c up_unblocktask.c up_udelay.c
-CMN_CSRCS += up_usestack.c up_vfork.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
+CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c
+CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
+CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
+CMN_CSRCS += arm_usestack.c arm_vfork.c
 
 ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
 CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_ARM_MPU),y)
-CMN_CSRCS += up_mpu.c
+CMN_CSRCS += arm_mpu.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
diff --git a/arch/arm/src/lpc43xx/chip.h b/arch/arm/src/lpc43xx/chip.h
index dee6106..607e270 100644
--- a/arch/arm/src/lpc43xx/chip.h
+++ b/arch/arm/src/lpc43xx/chip.h
@@ -1,35 +1,20 @@
 /************************************************************************************
  * arch/arm/src/lpc43xx/chip.h
  *
- *   Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt <gnutt@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ *   http://www.apache.org/licenses/LICENSE-2.0
  *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
  *
  ************************************************************************************/
 
@@ -49,7 +34,7 @@
 /* For each chip supported in chip.h, the following are provided to customize the
  * environment for the specific LPC43XX chip:
  *
- * Define ARMV7M_PERIPHERAL_INTERRUPTS - This is needed by common/up_vectors.c.  This
+ * Define ARMV7M_PERIPHERAL_INTERRUPTS - This is needed by common/arm_vectors.c.  This
  *   definition provides the number of "external" interrupt vectors supported by
  *   the specific LPC43 chip.
  *
diff --git a/arch/arm/src/lpc43xx/lpc43_ethernet.c b/arch/arm/src/lpc43xx/lpc43_ethernet.c
index f2a7eff..e4a317c 100644
--- a/arch/arm/src/lpc43xx/lpc43_ethernet.c
+++ b/arch/arm/src/lpc43xx/lpc43_ethernet.c
@@ -3866,7 +3866,7 @@ static inline int lpc43_ethinitialize(void)
  *
  * Description:
  *   This is the "standard" network initialization logic called from the
- *   low-level initialization logic in up_initialize.c.
+ *   low-level initialization logic in arm_initialize.c.
  *
  * Input Parameters:
  *   None.
diff --git a/arch/arm/src/lpc54xx/Make.defs b/arch/arm/src/lpc54xx/Make.defs
index bdb581c..819e1e4 100644
--- a/arch/arm/src/lpc54xx/Make.defs
+++ b/arch/arm/src/lpc54xx/Make.defs
@@ -44,38 +44,38 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_doirq.c up_exit.c up_hardfault.c up_initialize.c
-CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_mdelay.c
-CMN_CSRCS += up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
-CMN_CSRCS += up_svcall.c up_trigger_irq.c up_unblocktask.c up_udelay.c
-CMN_CSRCS += up_usestack.c up_vfork.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
+CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c
+CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
+CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
+CMN_CSRCS += arm_usestack.c arm_vfork.c
 
 ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
 CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_ARM_MPU),y)
-CMN_CSRCS += up_mpu.c
+CMN_CSRCS += arm_mpu.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
diff --git a/arch/arm/src/lpc54xx/lpc54_ethernet.c b/arch/arm/src/lpc54xx/lpc54_ethernet.c
index ce8930b..d6879bd 100644
--- a/arch/arm/src/lpc54xx/lpc54_ethernet.c
+++ b/arch/arm/src/lpc54xx/lpc54_ethernet.c
@@ -2998,7 +2998,7 @@ static int lpc54_phy_reset(struct lpc54_ethdriver_s *priv)
  *   Initialize the Ethernet controller and driver.
  *
  *   This is the "standard" network initialization logic called from the
- *   low-level initialization logic in up_initialize.c.
+ *   low-level initialization logic in arm_initialize.c.
  *
  * Input Parameters:
  *   intf - In the case where there are multiple EMACs, this value
diff --git a/arch/arm/src/max326xx/Make.defs b/arch/arm/src/max326xx/Make.defs
index 0406fc2..37857b0 100644
--- a/arch/arm/src/max326xx/Make.defs
+++ b/arch/arm/src/max326xx/Make.defs
@@ -46,34 +46,34 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_doirq.c up_exit.c up_hardfault.c
-CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
-CMN_CSRCS += up_mdelay.c up_memfault.c up_modifyreg8.c up_modifyreg16.c
-CMN_CSRCS += up_modifyreg32.c up_releasepending.c up_releasestack.c
-CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c up_sigdeliver.c
-CMN_CSRCS += up_stackframe.c up_svcall.c up_trigger_irq.c up_unblocktask.c
-CMN_CSRCS += up_udelay.c up_usestack.c up_vfork.c
+CMN_CSRCS  = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
+CMN_CSRCS += arm_createstack.c arm_doirq.c arm_exit.c arm_hardfault.c
+CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
+CMN_CSRCS += arm_mdelay.c arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c
+CMN_CSRCS += arm_modifyreg32.c arm_releasepending.c arm_releasestack.c
+CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c
+CMN_CSRCS += arm_stackframe.c arm_svcall.c arm_trigger_irq.c arm_unblocktask.c
+CMN_CSRCS += arm_udelay.c arm_usestack.c arm_vfork.c
 
 ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
 CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_mpu.c arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
diff --git a/arch/arm/src/moxart/Make.defs b/arch/arm/src/moxart/Make.defs
index 65253b5..c32d0c0 100644
--- a/arch/arm/src/moxart/Make.defs
+++ b/arch/arm/src/moxart/Make.defs
@@ -40,13 +40,13 @@ HEAD_ASRC = moxart_head.S
 
 CMN_ASRCS  = arm_saveusercontext.S arm_fullcontextrestore.S up_vectors.S
 CMN_ASRCS += up_nommuhead.S vfork.S
-CMN_CSRCS  = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_dataabort.c up_mdelay.c up_udelay.c
-CMN_CSRCS += up_exit.c up_initialstate.c up_initialize.c
-CMN_CSRCS += up_interruptcontext.c up_prefetchabort.c up_releasepending.c
-CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c
-CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_syscall.c up_unblocktask.c
-CMN_CSRCS += up_undefinedinsn.c up_usestack.c up_vfork.c up_etherstub.c
+CMN_CSRCS  = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
+CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c
+CMN_CSRCS += arm_exit.c arm_initialstate.c arm_initialize.c
+CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c
+CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
+CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_syscall.c arm_unblocktask.c
+CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c arm_etherstub.c
 
 CHIP_ASRCS  = moxart_lowputc.S
 
diff --git a/arch/arm/src/nrf52/Make.defs b/arch/arm/src/nrf52/Make.defs
index cd3f980..98f7ec4 100644
--- a/arch/arm/src/nrf52/Make.defs
+++ b/arch/arm/src/nrf52/Make.defs
@@ -44,34 +44,34 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_doirq.c up_exit.c up_hardfault.c
-CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
-CMN_CSRCS += up_memfault.c up_mdelay.c up_modifyreg8.c up_modifyreg16.c
-CMN_CSRCS += up_modifyreg32.c up_releasepending.c up_releasestack.c
-CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c up_sigdeliver.c
-CMN_CSRCS += up_stackframe.c up_svcall.c up_trigger_irq.c up_udelay.c
-CMN_CSRCS += up_unblocktask.c up_usestack.c up_vfork.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c
+CMN_CSRCS += arm_createstack.c arm_doirq.c arm_exit.c arm_hardfault.c
+CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
+CMN_CSRCS += arm_memfault.c arm_mdelay.c arm_modifyreg8.c arm_modifyreg16.c
+CMN_CSRCS += arm_modifyreg32.c arm_releasepending.c arm_releasestack.c
+CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c
+CMN_CSRCS += arm_stackframe.c arm_svcall.c arm_trigger_irq.c arm_udelay.c
+CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c
 
 ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
 CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_mpu.c arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
diff --git a/arch/arm/src/nuc1xx/Make.defs b/arch/arm/src/nuc1xx/Make.defs
index 8a84cca..efc6264 100644
--- a/arch/arm/src/nuc1xx/Make.defs
+++ b/arch/arm/src/nuc1xx/Make.defs
@@ -38,27 +38,27 @@ HEAD_ASRC =
 CMN_ASRCS  = up_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
 CMN_ASRCS += arm_switchcontext.S vfork.S
 
-CMN_CSRCS  = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
-CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
-CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
-CMN_CSRCS += up_systemreset.c up_unblocktask.c up_usestack.c up_doirq.c
-CMN_CSRCS += up_hardfault.c up_svcall.c up_vectors.c up_vfork.c
+CMN_CSRCS  = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
+CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
+CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
+CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
+CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
+CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 ifeq ($(CONFIG_DEBUG_FEATURES),y)
-CMN_CSRCS += up_dumpnvic.c
+CMN_CSRCS += arm_dumpnvic.c
 endif
 
 CHIP_ASRCS  =
diff --git a/arch/arm/src/s32k1xx/Make.defs b/arch/arm/src/s32k1xx/Make.defs
index 3f69fb0..b315304 100644
--- a/arch/arm/src/s32k1xx/Make.defs
+++ b/arch/arm/src/s32k1xx/Make.defs
@@ -37,17 +37,17 @@
 
 HEAD_ASRC  =
 CMN_ASRCS  =
-CMN_CSRCS  = up_allocateheap.c up_exit.c up_initialize.c up_interruptcontext.c
-CMN_CSRCS += up_lowputs.c up_mdelay.c up_modifyreg8.c up_modifyreg16.c
-CMN_CSRCS += up_modifyreg32.c up_puts.c up_releasestack.c up_stackframe.c
-CMN_CSRCS += up_task_start.c up_udelay.c up_usestack.c up_vfork.c
+CMN_CSRCS  = arm_allocateheap.c arm_exit.c arm_initialize.c arm_interruptcontext.c
+CMN_CSRCS += arm_lowputs.c arm_mdelay.c arm_modifyreg8.c arm_modifyreg16.c
+CMN_CSRCS += arm_modifyreg32.c arm_puts.c arm_releasestack.c arm_stackframe.c
+CMN_CSRCS += arm_task_start.c arm_udelay.c arm_usestack.c arm_vfork.c
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_pthread_start.c
+CMN_CSRCS += arm_pthread_start.c
 endif
 
 # Source files common to all S32K1xx chip families.
diff --git a/arch/arm/src/s32k1xx/s32k11x/Make.defs b/arch/arm/src/s32k1xx/s32k11x/Make.defs
index da1d052..6d6c18f 100644
--- a/arch/arm/src/s32k1xx/s32k11x/Make.defs
+++ b/arch/arm/src/s32k1xx/s32k11x/Make.defs
@@ -38,19 +38,19 @@
 CMN_ASRCS += up_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
 CMN_ASRCS += arm_switchcontext.S vfork.S
 
-CMN_CSRCS += up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_initialstate.c up_releasepending.c up_reprioritizertr.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_systemreset.c
-CMN_CSRCS += up_unblocktask.c up_doirq.c up_hardfault.c up_svcall.c
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_initialstate.c arm_releasepending.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_systemreset.c
+CMN_CSRCS += arm_unblocktask.c arm_doirq.c arm_hardfault.c arm_svcall.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_DEBUG_FEATURES),y)
-CMN_CSRCS += up_dumpnvic.c
+CMN_CSRCS += arm_dumpnvic.c
 endif
 
 # Source file specific to the S32k11x family
diff --git a/arch/arm/src/s32k1xx/s32k14x/Make.defs b/arch/arm/src/s32k1xx/s32k14x/Make.defs
index b9b7ae3..d1b929e 100644
--- a/arch/arm/src/s32k1xx/s32k14x/Make.defs
+++ b/arch/arm/src/s32k1xx/s32k14x/Make.defs
@@ -44,25 +44,25 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS += up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_doirq.c up_hardfault.c up_initialstate.c up_memfault.c
-CMN_CSRCS += up_releasepending.c up_reprioritizertr.c up_schedulesigaction.c
-CMN_CSRCS += up_sigdeliver.c up_svcall.c up_trigger_irq.c up_unblocktask.c
-CMN_CSRCS += up_systemreset.c
+CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_doirq.c arm_hardfault.c arm_initialstate.c arm_memfault.c
+CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c arm_schedulesigaction.c
+CMN_CSRCS += arm_sigdeliver.c arm_svcall.c arm_trigger_irq.c arm_unblocktask.c
+CMN_CSRCS += arm_systemreset.c
 
 ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
 CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_mpu.c up_signal_dispatch.c
+CMN_CSRCS += arm_mpu.c arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
diff --git a/arch/arm/src/sam34/Make.defs b/arch/arm/src/sam34/Make.defs
index 44b3c04..4df403b 100644
--- a/arch/arm/src/sam34/Make.defs
+++ b/arch/arm/src/sam34/Make.defs
@@ -52,18 +52,18 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_doirq.c up_exit.c up_hardfault.c up_initialize.c
-CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_mdelay.c
-CMN_CSRCS += up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
-CMN_CSRCS += up_svcall.c up_trigger_irq.c up_unblocktask.c up_udelay.c
-CMN_CSRCS += up_usestack.c up_vfork.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
+CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c
+CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
+CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
+CMN_CSRCS += arm_usestack.c arm_vfork.c
 
 ifneq ($(CONFIG_SMP),y)
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
-CMN_CSRCS += up_idle.c
+CMN_CSRCS += arm_idle.c
 endif
 endif
 
@@ -74,19 +74,19 @@ CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_ARM_MPU),y)
-CMN_CSRCS += up_mpu.c
+CMN_CSRCS += arm_mpu.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
@@ -96,7 +96,7 @@ CMN_CSRCS += arm_copyarmstate.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 # Required SAM3/4 files
diff --git a/arch/arm/src/sama5/Make.defs b/arch/arm/src/sama5/Make.defs
index 67fefb6..1245f9e 100644
--- a/arch/arm/src/sama5/Make.defs
+++ b/arch/arm/src/sama5/Make.defs
@@ -1,35 +1,23 @@
 ############################################################################
 # arch/arm/sama5/Make.defs
 #
-#   Copyright (C) 2013-2014, 2016, 2018 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016, 2018 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
 #
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name Gregory Nutt nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
+#   http://www.apache.org/licenses/LICENSE-2.0
 #
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
 #
 ############################################################################
 
@@ -54,8 +42,8 @@ endif
 # Common assembly language files
 
 CMN_ASRCS += arm_vectors.S arm_fpuconfig.S arm_fullcontextrestore.S
-CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S arm_vfork.S
-CMN_ASRCS += arm_testset.S arm_fetchadd.S
+CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S
+CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
 CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
 CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
 
@@ -63,10 +51,10 @@ CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.
 
 # Common C source files
 
-CMN_CSRCS  = up_initialize.c up_interruptcontext.c up_exit.c up_createstack.c
-CMN_CSRCS += up_releasestack.c up_usestack.c up_vfork.c up_puts.c up_mdelay.c
-CMN_CSRCS += up_stackframe.c up_udelay.c up_modifyreg8.c up_modifyreg16.c
-CMN_CSRCS += up_modifyreg32.c
+CMN_CSRCS  = arm_initialize.c arm_interruptcontext.c arm_exit.c arm_createstack.c
+CMN_CSRCS += arm_releasestack.c arm_usestack.c arm_vfork.c arm_puts.c arm_mdelay.c
+CMN_CSRCS += arm_stackframe.c arm_udelay.c arm_modifyreg8.c arm_modifyreg16.c
+CMN_CSRCS += arm_modifyreg32.c
 
 CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
 CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
@@ -77,7 +65,7 @@ CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
 # Configuration dependent C files
 
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
-CMN_CSRCS += up_idle.c
+CMN_CSRCS += arm_idle.c
 endif
 
 ifeq ($(CONFIG_ARMV7A_L2CC_PL310),y)
@@ -90,7 +78,7 @@ CMN_CSRCS += arm_va2pte.c
 endif
 
 ifeq ($(CONFIG_BUILD_KERNEL),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c arm_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c arm_signal_dispatch.c
 endif
 
 ifeq ($(CONFIG_ARCH_ADDRENV),y)
@@ -121,7 +109,7 @@ CMN_CSRCS += arm_copyarmstate.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 # SAMA5-specific assembly language files
diff --git a/arch/arm/src/sama5/sam_ethernet.c b/arch/arm/src/sama5/sam_ethernet.c
index 292ee15..e764de4 100644
--- a/arch/arm/src/sama5/sam_ethernet.c
+++ b/arch/arm/src/sama5/sam_ethernet.c
@@ -160,7 +160,7 @@ static inline void up_emac_initialize(void)
  *
  * Description:
  *   This is the "standard" network initialization logic called from the
- *   low-level initialization logic in up_initialize.c.  If both the EMAC
+ *   low-level initialization logic in arm_initialize.c.  If both the EMAC
  *   and GMAC are enabled, then this single entry point must initialize
  *   both.
  *
diff --git a/arch/arm/src/samd2l2/Make.defs b/arch/arm/src/samd2l2/Make.defs
index a9a9f09..bbe26c9 100644
--- a/arch/arm/src/samd2l2/Make.defs
+++ b/arch/arm/src/samd2l2/Make.defs
@@ -38,27 +38,27 @@ HEAD_ASRC =
 CMN_ASRCS  = up_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
 CMN_ASRCS += arm_switchcontext.S vfork.S
 
-CMN_CSRCS  = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
-CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
-CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
-CMN_CSRCS += up_systemreset.c up_unblocktask.c up_usestack.c up_doirq.c
-CMN_CSRCS += up_hardfault.c up_svcall.c up_vectors.c up_vfork.c
+CMN_CSRCS  = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
+CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
+CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
+CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
+CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
+CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 ifeq ($(CONFIG_DEBUG_FEATURES),y)
-CMN_CSRCS += up_dumpnvic.c
+CMN_CSRCS += arm_dumpnvic.c
 endif
 
 CHIP_ASRCS  =
diff --git a/arch/arm/src/samd5e5/Make.defs b/arch/arm/src/samd5e5/Make.defs
index 3024e74..cfcfd70 100644
--- a/arch/arm/src/samd5e5/Make.defs
+++ b/arch/arm/src/samd5e5/Make.defs
@@ -51,14 +51,14 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_exit.c up_initialize.c up_initialstate.c
-CMN_CSRCS += up_interruptcontext.c up_mdelay.c up_memfault.c up_modifyreg8.c
-CMN_CSRCS += up_modifyreg16.c up_modifyreg32.c up_releasepending.c
-CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c
-CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_svcall.c up_trigger_irq.c
-CMN_CSRCS += up_unblocktask.c up_udelay.c up_usestack.c up_doirq.c
-CMN_CSRCS += up_hardfault.c up_vfork.c
+CMN_CSRCS  = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
+CMN_CSRCS += arm_createstack.c arm_exit.c arm_initialize.c arm_initialstate.c
+CMN_CSRCS += arm_interruptcontext.c arm_mdelay.c arm_memfault.c arm_modifyreg8.c
+CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
+CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
+CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_trigger_irq.c
+CMN_CSRCS += arm_unblocktask.c arm_udelay.c arm_usestack.c arm_doirq.c
+CMN_CSRCS += arm_hardfault.c arm_vfork.c
 
 # Configuration-dependent common files
 
@@ -67,15 +67,15 @@ CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_mpu.c arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
@@ -85,7 +85,7 @@ CMN_CSRCS += arm_copyarmstate.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 # Required SAMD5x/E5x files
diff --git a/arch/arm/src/samd5e5/sam_ethernet.c b/arch/arm/src/samd5e5/sam_ethernet.c
index d668911..6ea7eb5 100644
--- a/arch/arm/src/samd5e5/sam_ethernet.c
+++ b/arch/arm/src/samd5e5/sam_ethernet.c
@@ -104,7 +104,7 @@ static inline void up_gmac_initialize(void)
  *
  * Description:
  *   This is the "standard" network initialization logic called from the
- *   low-level initialization logic in up_initialize.c.
+ *   low-level initialization logic in arm_initialize.c.
  *
  * Input Parameters:
  *   None.
diff --git a/arch/arm/src/samv7/Make.defs b/arch/arm/src/samv7/Make.defs
index 04f59b7..92d5abe 100644
--- a/arch/arm/src/samv7/Make.defs
+++ b/arch/arm/src/samv7/Make.defs
@@ -52,23 +52,23 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_doirq.c up_exit.c up_hardfault.c up_initialize.c
-CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_mdelay.c
-CMN_CSRCS += up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
-CMN_CSRCS += up_svcall.c up_trigger_irq.c up_unblocktask.c up_udelay.c
-CMN_CSRCS += up_usestack.c up_vfork.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
+CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c
+CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
+CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
+CMN_CSRCS += arm_usestack.c arm_vfork.c
 
 # Configuration-dependent common files
 
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
-CMN_CSRCS += up_idle.c
+CMN_CSRCS += arm_idle.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
-CMN_CSRCS += up_stackcheck.c
+CMN_CSRCS += arm_stackcheck.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
@@ -76,9 +76,9 @@ CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
-CMN_CSRCS += up_cache.c
+CMN_CSRCS += arm_cache.c
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += up_fpu.S
@@ -86,20 +86,20 @@ CMN_CSRCS += arm_copyarmstate.c
 endif
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_ARM_MPU),y)
-CMN_CSRCS += up_mpu.c
+CMN_CSRCS += arm_mpu.c
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 # Required SAMV7 files
diff --git a/arch/arm/src/samv7/sam_ethernet.c b/arch/arm/src/samv7/sam_ethernet.c
index b450bbd..0161429 100644
--- a/arch/arm/src/samv7/sam_ethernet.c
+++ b/arch/arm/src/samv7/sam_ethernet.c
@@ -53,7 +53,7 @@
  *
  * Description:
  *   This is the "standard" network initialization logic called from the
- *   low-level initialization logic in up_initialize.c.  This is just
+ *   low-level initialization logic in arm_initialize.c.  This is just
  *   a shim to support the slightly different prototype of
  *   sam_emac_intiialize() and to provide support for future chips that
  *   may have multiple EMAC peripherals.
diff --git a/arch/arm/src/stm32/Make.defs b/arch/arm/src/stm32/Make.defs
index bb89968..e18e05d 100644
--- a/arch/arm/src/stm32/Make.defs
+++ b/arch/arm/src/stm32/Make.defs
@@ -47,21 +47,21 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_exit.c up_hardfault.c up_initialize.c up_initialstate.c
-CMN_CSRCS += up_interruptcontext.c up_mdelay.c up_memfault.c up_modifyreg8.c
-CMN_CSRCS += up_modifyreg16.c up_modifyreg32.c up_releasepending.c
-CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c
-CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_svcall.c up_systemreset.c
-CMN_CSRCS += up_trigger_irq.c up_unblocktask.c up_udelay.c up_usestack.c
-CMN_CSRCS += up_doirq.c up_vfork.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_exit.c arm_hardfault.c arm_initialize.c arm_initialstate.c
+CMN_CSRCS += arm_interruptcontext.c arm_mdelay.c arm_memfault.c arm_modifyreg8.c
+CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
+CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
+CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c
+CMN_CSRCS += arm_trigger_irq.c arm_unblocktask.c arm_udelay.c arm_usestack.c
+CMN_CSRCS += arm_doirq.c arm_vfork.c
 
 ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
-CMN_CSRCS += up_stackcheck.c
+CMN_CSRCS += arm_stackcheck.c
 endif
 
 ifeq ($(CONFIG_ARM_LWL_CONSOLE),y)
-CMN_CSRCS += up_lwl_console.c
+CMN_CSRCS += arm_lwl_console.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
@@ -69,24 +69,24 @@ CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_ARM_MPU),y)
-CMN_CSRCS += up_mpu.c
+CMN_CSRCS += arm_mpu.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
@@ -95,7 +95,7 @@ CMN_CSRCS += arm_copyarmstate.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
-CMN_CSRCS += up_itm_syslog.c
+CMN_CSRCS += arm_itm_syslog.c
 endif
 
 CHIP_ASRCS  =
diff --git a/arch/arm/src/stm32/stm32_eth.c b/arch/arm/src/stm32/stm32_eth.c
index 9a2eff8..2f0a336 100644
--- a/arch/arm/src/stm32/stm32_eth.c
+++ b/arch/arm/src/stm32/stm32_eth.c
@@ -4092,7 +4092,7 @@ int stm32_ethinitialize(int intf)
  *
  * Description:
  *   This is the "standard" network initialization logic called from the
- *   low-level initialization logic in up_initialize.c.  If STM32_NETHERNET
+ *   low-level initialization logic in arm_initialize.c.  If STM32_NETHERNET
  *   greater than one, then board specific logic will have to supply a
  *   version of up_netinitialize() that calls stm32_ethinitialize() with
  *   the appropriate interface number.
diff --git a/arch/arm/src/stm32f0l0g0/Make.defs b/arch/arm/src/stm32f0l0g0/Make.defs
index 00c605c..84e17fd 100644
--- a/arch/arm/src/stm32f0l0g0/Make.defs
+++ b/arch/arm/src/stm32f0l0g0/Make.defs
@@ -39,27 +39,27 @@ HEAD_ASRC =
 CMN_ASRCS  = up_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
 CMN_ASRCS += arm_switchcontext.S vfork.S
 
-CMN_CSRCS  = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
-CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
-CMN_CSRCS += up_puts.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
-CMN_CSRCS += up_systemreset.c up_unblocktask.c up_usestack.c up_doirq.c
-CMN_CSRCS += up_hardfault.c up_svcall.c up_vectors.c up_vfork.c
+CMN_CSRCS  = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
+CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
+CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
+CMN_CSRCS += arm_puts.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
+CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
+CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 ifeq ($(CONFIG_DEBUG_FEATURES),y)
-CMN_CSRCS += up_dumpnvic.c
+CMN_CSRCS += arm_dumpnvic.c
 endif
 
 CHIP_ASRCS  =
diff --git a/arch/arm/src/stm32f7/Make.defs b/arch/arm/src/stm32f7/Make.defs
index af713d5..6bb8f44 100644
--- a/arch/arm/src/stm32f7/Make.defs
+++ b/arch/arm/src/stm32f7/Make.defs
@@ -52,21 +52,21 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_doirq.c up_exit.c up_hardfault.c up_initialize.c
-CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_mdelay.c
-CMN_CSRCS += up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
-CMN_CSRCS += up_svcall.c up_systemreset.c up_trigger_irq.c up_unblocktask.c
-CMN_CSRCS += up_udelay.c up_usestack.c up_vfork.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
+CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c
+CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
+CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_unblocktask.c
+CMN_CSRCS += arm_udelay.c arm_usestack.c arm_vfork.c
 
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
-CMN_CSRCS += up_idle.c
+CMN_CSRCS += arm_idle.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
-CMN_CSRCS += up_stackcheck.c
+CMN_CSRCS += arm_stackcheck.c
 endif
 
 # Configuration-dependent common files
@@ -76,9 +76,9 @@ CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
-CMN_CSRCS += up_cache.c
+CMN_CSRCS += arm_cache.c
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += up_fpu.S
@@ -86,25 +86,25 @@ CMN_CSRCS += arm_copyarmstate.c
 endif
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
-CMN_CSRCS += up_itm_syslog.c
+CMN_CSRCS += arm_itm_syslog.c
 endif
 
 ifeq ($(CONFIG_ARM_MPU),y)
-CMN_CSRCS += up_mpu.c
+CMN_CSRCS += arm_mpu.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 # Required STM32F7 files
diff --git a/arch/arm/src/stm32f7/stm32_ethernet.c b/arch/arm/src/stm32f7/stm32_ethernet.c
index 49e1cc9..d19e7de 100644
--- a/arch/arm/src/stm32f7/stm32_ethernet.c
+++ b/arch/arm/src/stm32f7/stm32_ethernet.c
@@ -4191,7 +4191,7 @@ int stm32_ethinitialize(int intf)
  *
  * Description:
  *   This is the "standard" network initialization logic called from the
- *   low-level initialization logic in up_initialize.c.  If STM32F7_NETHERNET
+ *   low-level initialization logic in arm_initialize.c.  If STM32F7_NETHERNET
  *   greater than one, then board specific logic will have to supply a
  *   version of up_netinitialize() that calls stm32_ethinitialize() with
  *   the appropriate interface number.
diff --git a/arch/arm/src/stm32h7/Make.defs b/arch/arm/src/stm32h7/Make.defs
index 9530768..05e2191 100644
--- a/arch/arm/src/stm32h7/Make.defs
+++ b/arch/arm/src/stm32h7/Make.defs
@@ -52,19 +52,19 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_doirq.c up_exit.c up_hardfault.c  up_initialize.c
-CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_mdelay.c up_memfault.c
-CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c up_svcall.c
-CMN_CSRCS += up_systemreset.c up_trigger_irq.c up_udelay.c up_unblocktask.c
-CMN_CSRCS += up_usestack.c up_vfork.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c  arm_initialize.c
+CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c arm_memfault.c
+CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c arm_svcall.c
+CMN_CSRCS += arm_systemreset.c arm_trigger_irq.c arm_udelay.c arm_unblocktask.c
+CMN_CSRCS += arm_usestack.c arm_vfork.c
 
 # Configuration-dependent common files
 
 ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
-CMN_CSRCS += up_stackcheck.c
+CMN_CSRCS += arm_stackcheck.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
@@ -72,20 +72,20 @@ CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
-CMN_CSRCS += up_cache.c
+CMN_CSRCS += arm_cache.c
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += up_fpu.S
 CMN_CSRCS += arm_copyarmstate.c
 endif
 
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
-CMN_CSRCS += up_idle.c
+CMN_CSRCS += arm_idle.c
 endif
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_STM32H7_PROGMEM),y)
@@ -93,17 +93,17 @@ CMN_CSRCS += stm32_flash.c
 endif
 
 ifeq ($(CONFIG_ARM_MPU),y)
-CMN_CSRCS += up_mpu.c
+CMN_CSRCS += arm_mpu.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 # Required STM32H7 files
@@ -135,7 +135,7 @@ endif
 ifeq ($(CONFIG_STM32H7_BBSRAM),y)
 ifeq ($(CONFIG_ARMV7M_DCACHE),y)
 ifeq ($(CONFIG_ARM_MPU),y)
-CMN_CSRCS += up_mpu.c
+CMN_CSRCS += arm_mpu.c
 endif
 endif
 CHIP_CSRCS += stm32_bbsram.c
diff --git a/arch/arm/src/stm32h7/stm32_ethernet.c b/arch/arm/src/stm32h7/stm32_ethernet.c
index f5fc0c0..55152ef 100644
--- a/arch/arm/src/stm32h7/stm32_ethernet.c
+++ b/arch/arm/src/stm32h7/stm32_ethernet.c
@@ -4389,7 +4389,7 @@ static inline int stm32_ethinitialize(int intf)
  *
  * Description:
  *   This is the "standard" network initialization logic called from the
- *   low-level initialization logic in up_initialize.c.  If STM32H7_NETHERNET
+ *   low-level initialization logic in arm_initialize.c.  If STM32H7_NETHERNET
  *   greater than one, then board specific logic will have to supply a
  *   version of up_netinitialize() that calls stm32_ethinitialize() with
  *   the appropriate interface number.
diff --git a/arch/arm/src/stm32h7/stm32_rcc.h b/arch/arm/src/stm32h7/stm32_rcc.h
index afb36bc..498bea3 100644
--- a/arch/arm/src/stm32h7/stm32_rcc.h
+++ b/arch/arm/src/stm32h7/stm32_rcc.h
@@ -1,35 +1,20 @@
 /************************************************************************************
  * arch/arm/src/stm32h7/stm32_rcc.h
  *
- *   Copyright (C) 2018 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt <gnutt@nuttx.orgr>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
  *
  ************************************************************************************/
 
@@ -72,7 +57,7 @@ extern "C"
  * set the NVIC vector location to this alternative location.
  */
 
-extern uint32_t _vectors[];  /* See armv7-m/up_vectors.c */
+extern uint32_t _vectors[];  /* See armv7-m/arm_vectors.c */
 
 /************************************************************************************
  * Inline Functions
diff --git a/arch/arm/src/stm32l4/Make.defs b/arch/arm/src/stm32l4/Make.defs
index 5ce1b37..4d4c189 100644
--- a/arch/arm/src/stm32l4/Make.defs
+++ b/arch/arm/src/stm32l4/Make.defs
@@ -53,19 +53,19 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_doirq.c up_exit.c up_hardfault.c up_initialize.c
-CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_mdelay.c up_memfault.c
-CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
-CMN_CSRCS += up_svcall.c up_systemreset.c up_trigger_irq.c up_udelay.c
-CMN_CSRCS += up_unblocktask.c up_usestack.c up_vfork.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
+CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c arm_memfault.c
+CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
+CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_udelay.c
+CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c
 
 # Configuration-dependent common files
 
 ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
-CMN_CSRCS += up_stackcheck.c
+CMN_CSRCS += arm_stackcheck.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
@@ -73,7 +73,7 @@ CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += up_fpu.S
@@ -81,21 +81,21 @@ CMN_CSRCS += arm_copyarmstate.c
 endif
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_ARM_MPU),y)
-CMN_CSRCS += up_mpu.c
+CMN_CSRCS += arm_mpu.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 # Required STM32L4 files
diff --git a/arch/arm/src/str71x/Make.defs b/arch/arm/src/str71x/Make.defs
index dbd785a..916fcd6 100644
--- a/arch/arm/src/str71x/Make.defs
+++ b/arch/arm/src/str71x/Make.defs
@@ -38,21 +38,21 @@ HEAD_ASRC = str71x_head.S
 CMN_ASRCS  = arm_saveusercontext.S arm_fullcontextrestore.S up_vectors.S
 CMN_ASRCS += vfork.S
 
-CMN_CSRCS  = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_dataabort.c up_mdelay.c up_udelay.c
-CMN_CSRCS += up_exit.c up_initialize.c up_initialstate.c
-CMN_CSRCS += up_interruptcontext.c up_prefetchabort.c up_releasepending.c
-CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_stackframe.c
-CMN_CSRCS += up_syscall.c up_unblocktask.c up_undefinedinsn.c up_usestack.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c
-CMN_CSRCS += up_lowputs.c up_vfork.c
+CMN_CSRCS  = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
+CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c
+CMN_CSRCS += arm_exit.c arm_initialize.c arm_initialstate.c
+CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c
+CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_stackframe.c
+CMN_CSRCS += arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c arm_usestack.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
+CMN_CSRCS += arm_lowputs.c arm_vfork.c
 
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
-CMN_CSRCS += up_idle.c
+CMN_CSRCS += arm_idle.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 CHIP_ASRCS  =
diff --git a/arch/arm/src/tiva/Make.defs b/arch/arm/src/tiva/Make.defs
index 454a099..afd45dd 100644
--- a/arch/arm/src/tiva/Make.defs
+++ b/arch/arm/src/tiva/Make.defs
@@ -45,21 +45,21 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_doirq.c up_exit.c up_hardfault.c up_initialize.c
-CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_mdelay.c
-CMN_CSRCS += up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
-CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
-CMN_CSRCS += up_svcall.c up_trigger_irq.c up_unblocktask.c up_udelay.c
-CMN_CSRCS += up_usestack.c up_vfork.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
+CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c
+CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
+CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
+CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
+CMN_CSRCS += arm_usestack.c arm_vfork.c
 
 ifeq ($(CONFIG_ARM_SEMIHOSTING_HOSTFS),y)
-  CMN_CSRCS += up_hostfs.c
+  CMN_CSRCS += arm_hostfs.c
 endif
 
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
-  CMN_CSRCS += up_idle.c
+  CMN_CSRCS += arm_idle.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
@@ -68,7 +68,7 @@ else
   CMN_ASRCS += up_exception.S
 endif
 
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_FPU),y)
   CMN_ASRCS += up_fpu.S
@@ -76,23 +76,23 @@ ifeq ($(CONFIG_ARCH_FPU),y)
 endif
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-  CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+  CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-  CMN_CSRCS += up_checkstack.c
+  CMN_CSRCS += arm_checkstack.c
 endif
 
 ifeq ($(CONFIG_ARM_MPU),y)
-CMN_CSRCS += up_mpu.c
+CMN_CSRCS += arm_mpu.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-  CMN_CSRCS += up_task_start.c up_pthread_start.c
-  CMN_CSRCS += up_signal_dispatch.c
+  CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+  CMN_CSRCS += arm_signal_dispatch.c
   CMN_UASRCS += up_signal_handler.S
 else
-  CMN_CSRCS += up_allocateheap.c
+  CMN_CSRCS += arm_allocateheap.c
 endif
 
 CHIP_ASRCS  =
diff --git a/arch/arm/src/tiva/tm4c/tm4c_ethernet.c b/arch/arm/src/tiva/tm4c/tm4c_ethernet.c
index c6b231d..b965d06 100644
--- a/arch/arm/src/tiva/tm4c/tm4c_ethernet.c
+++ b/arch/arm/src/tiva/tm4c/tm4c_ethernet.c
@@ -1,35 +1,20 @@
 /****************************************************************************
  * arch/arm/src/tiva/tm4c/tm4c_ethernet.c
  *
- *   Copyright (C) 2014-2015, 2017-2018 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt <gnutt@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
  *
  ****************************************************************************/
 
@@ -3311,6 +3296,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
      nerr("ERROR: Failed to write the PHY MCR: %d\n", ret);
       return ret;
     }
+
   up_mdelay(PHY_CONFIG_DELAY);
 
   /* Remember the selected speed and duplex modes */
@@ -4145,7 +4131,7 @@ int tiva_ethinitialize(int intf)
  *
  * Description:
  *   This is the "standard" network initialization logic called from the
- *   low-level initialization logic in up_initialize.c.  If TIVA_NETHCONTROLLERS
+ *   low-level initialization logic in arm_initialize.c.  If TIVA_NETHCONTROLLERS
  *   greater than one, then board specific logic will have to supply a
  *   version of up_netinitialize() that calls tiva_ethinitialize() with
  *   the appropriate interface number.
diff --git a/arch/arm/src/tms570/Make.defs b/arch/arm/src/tms570/Make.defs
index 2661fbb..1d27bef 100644
--- a/arch/arm/src/tms570/Make.defs
+++ b/arch/arm/src/tms570/Make.defs
@@ -1,35 +1,23 @@
 ############################################################################
 # arch/arm/tms570/Make.defs
 #
-#   Copyright (C) 2015, 2018 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016, 2018 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
 #
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name Gregory Nutt nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
+#   http://www.apache.org/licenses/LICENSE-2.0
 #
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
 #
 ############################################################################
 
@@ -41,8 +29,8 @@ HEAD_ASRC  = arm_vectortab.S
 # Common assembly language files
 
 CMN_ASRCS += arm_vectortab.S arm_vectors.S arm_head.S arm_fullcontextrestore.S
-CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S arm_vfork.S
-CMN_ASRCS += arm_testset.S arm_fetchadd.S
+CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S
+CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
 CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
 CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S
 CMN_ASRCS += cp15_invalidate_dcache_all.S
@@ -55,10 +43,10 @@ endif
 
 # Common C source files
 
-CMN_CSRCS  = up_allocateheap.c up_initialize.c up_interruptcontext.c
-CMN_CSRCS += up_exit.c up_createstack.c up_releasestack.c up_usestack.c
-CMN_CSRCS += up_vfork.c up_puts.c up_mdelay.c up_stackframe.c up_udelay.c
-CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
+CMN_CSRCS  = arm_allocateheap.c arm_initialize.c arm_interruptcontext.c
+CMN_CSRCS += arm_exit.c arm_createstack.c arm_releasestack.c arm_usestack.c
+CMN_CSRCS += arm_vfork.c arm_puts.c arm_mdelay.c arm_stackframe.c arm_udelay.c
+CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
 
 CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
 CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_prefetchabort.c
@@ -69,11 +57,11 @@ CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
 # Configuration dependent C files
 
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
-CMN_CSRCS += up_idle.c
+CMN_CSRCS += arm_idle.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += arm_mpu.c up_task_start.c up_pthread_start.c
+CMN_CSRCS += arm_mpu.c arm_task_start.c arm_pthread_start.c
 CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += arm_signal_handler.S
 endif
@@ -90,7 +78,7 @@ CMN_CSRCS += arm_copyarmstate.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
 # SAMA5-specific assembly language files
diff --git a/arch/arm/src/xmc4/Make.defs b/arch/arm/src/xmc4/Make.defs
index dc50300..5cf0221 100644
--- a/arch/arm/src/xmc4/Make.defs
+++ b/arch/arm/src/xmc4/Make.defs
@@ -47,17 +47,17 @@ CMN_ASRCS += up_setjmp.S
 endif
 endif
 
-CMN_CSRCS  = up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_doirq.c up_exit.c up_initialize.c up_initialstate.c
-CMN_CSRCS += up_hardfault.c up_interruptcontext.c up_memfault.c up_mdelay.c
-CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
-CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c
-CMN_CSRCS += up_releasepending.c up_sigdeliver.c up_stackframe.c up_svcall.c
-CMN_CSRCS += up_systemreset.c up_udelay.c up_unblocktask.c up_usestack.c
-CMN_CSRCS += up_vfork.c
+CMN_CSRCS  = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
+CMN_CSRCS += arm_doirq.c arm_exit.c arm_initialize.c arm_initialstate.c
+CMN_CSRCS += arm_hardfault.c arm_interruptcontext.c arm_memfault.c arm_mdelay.c
+CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
+CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
+CMN_CSRCS += arm_releasepending.c arm_sigdeliver.c arm_stackframe.c arm_svcall.c
+CMN_CSRCS += arm_systemreset.c arm_udelay.c arm_unblocktask.c arm_usestack.c
+CMN_CSRCS += arm_vfork.c
 
 ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
-CMN_CSRCS += up_stackcheck.c
+CMN_CSRCS += arm_stackcheck.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
@@ -65,33 +65,33 @@ CMN_ASRCS += up_lazyexception.S
 else
 CMN_ASRCS += up_exception.S
 endif
-CMN_CSRCS += up_vectors.c
+CMN_CSRCS += arm_vectors.c
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_ARM_MPU),y)
-CMN_CSRCS += up_mpu.c
+CMN_CSRCS += arm_mpu.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS += up_task_start.c up_pthread_start.c
-CMN_CSRCS += up_signal_dispatch.c
+CMN_CSRCS += arm_task_start.c arm_pthread_start.c
+CMN_CSRCS += arm_signal_dispatch.c
 CMN_UASRCS += up_signal_handler.S
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
+CMN_CSRCS += arm_checkstack.c
 endif
 
-# Use of common/up_etherstub.c is deprecated.  The preferred mechanism is to
+# Use of common/arm_etherstub.c is deprecated.  The preferred mechanism is to
 # use CONFIG_NETDEV_LATEINIT=y to suppress the call to up_netinitialize() in
 # up_initialize().  Then this stub would not be needed.
 
 ifeq ($(CONFIG_NET),y)
 ifneq ($(CONFIG_XMC4_ENET),y)
-CMN_CSRCS += up_etherstub.c
+CMN_CSRCS += arm_etherstub.c
 endif
 endif
 
@@ -101,7 +101,7 @@ CMN_CSRCS += arm_copyarmstate.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
-CMN_CSRCS += up_itm_syslog.c
+CMN_CSRCS += arm_itm_syslog.c
 endif
 
 # Required XMC4xxx files


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