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From gn...@apache.org
Subject [incubator-nuttx] 01/03: arch/arm/src/stm32/stm32_adc.h: fix nxstyle issues
Date Fri, 03 Apr 2020 21:29:21 GMT
This is an automated email from the ASF dual-hosted git repository.

gnutt pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git

commit 89882518144eef9a8314215826af9a899a187863
Author: raiden00pl <raiden00pl@gmail.com>
AuthorDate: Fri Apr 3 22:48:06 2020 +0200

    arch/arm/src/stm32/stm32_adc.h: fix nxstyle issues
---
 arch/arm/src/stm32/stm32_adc.h | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/arch/arm/src/stm32/stm32_adc.h b/arch/arm/src/stm32/stm32_adc.h
index 6bfb423..a807823 100644
--- a/arch/arm/src/stm32/stm32_adc.h
+++ b/arch/arm/src/stm32/stm32_adc.h
@@ -53,7 +53,9 @@
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
+
 /* Configuration ********************************************************************/
+
 /* Timer devices may be used for different purposes.  One special purpose is to
  * control periodic ADC sampling.  If CONFIG_STM32_TIMn is defined then
  * CONFIG_STM32_TIMn_ADC must also be defined to indicate that timer "n" is intended
@@ -1303,7 +1305,7 @@
 #  define ADC2_JEXTSEL_HRTTRG4 ADC12_JSQR_JEXTSEL_HRT1TRG4
 #endif
 
-/* EXTSEL configuration *****************************************************/
+/* EXTSEL configuration *************************************************************/
 
 #if defined(CONFIG_STM32_TIM1_ADC1)
 #  if CONFIG_STM32_ADC1_TIMTRIG == 0
@@ -1839,7 +1841,7 @@
 #  endif
 #endif
 
-/* JEXTSEL configuration ****************************************************/
+/* JEXTSEL configuration ************************************************************/
 
 /* TODO: ADC1 JEXTSEL trigger */
 
@@ -1869,7 +1871,7 @@
 
 #undef ADC4_JEXTSEL_VALUE
 
-/* ADC interrupts ***********************************************************/
+/* ADC interrupts *******************************************************************/
 
 #if defined(HAVE_IP_ADC_V1)
 #  define ADC_ISR_EOC                  ADC_SR_EOC
@@ -1905,7 +1907,7 @@
 #define ADC_IER_ALLINTS (ADC_IER_EOC | ADC_IER_AWD | ADC_IER_JEOC | \
                          ADC_IER_JEOS | ADC_IER_OVR)
 
-/* Low-level ops helpers ****************************************************/
+/* Low-level ops helpers ************************************************************/
 
 #define ADC_INT_ACK(adc, source)                     \
         (adc)->llops->int_ack(adc, source)
@@ -2099,7 +2101,7 @@ extern "C"
 #define EXTERN extern
 #endif
 
-/****************************************************************************
+/************************************************************************************
  * Name: stm32_adcinitialize
  *
  * Description:
@@ -2113,7 +2115,7 @@ extern "C"
  * Returned Value:
  *   Valid ADC device structure reference on success; a NULL on failure
  *
- ****************************************************************************/
+ ************************************************************************************/
 
 struct adc_dev_s;
 struct adc_dev_s *stm32_adcinitialize(int intf, FAR const uint8_t *chanlist,


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