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Tue, 28 Jun 2016 16:46:34 +0000 Received: from localhost (localhost [127.0.0.1]) by spamd2-us-west.apache.org (ASF Mail Server at spamd2-us-west.apache.org) with ESMTP id 20F5E1A070E for ; Tue, 28 Jun 2016 16:46:34 +0000 (UTC) X-Virus-Scanned: Debian amavisd-new at spamd2-us-west.apache.org X-Spam-Flag: NO X-Spam-Score: -4.644 X-Spam-Level: X-Spam-Status: No, score=-4.644 tagged_above=-999 required=6.31 tests=[KAM_ASCII_DIVIDERS=0.8, KAM_LAZY_DOMAIN_SECURITY=1, LOTS_OF_MONEY=0.001, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, RP_MATCHES_RCVD=-1.426, URIBL_RED=0.001] autolearn=disabled Received: from mx1-lw-us.apache.org ([10.40.0.8]) by localhost (spamd2-us-west.apache.org [10.40.0.9]) (amavisd-new, port 10024) with ESMTP id o5CAvxqBvfui for ; Tue, 28 Jun 2016 16:46:28 +0000 (UTC) Received: from mail.apache.org (hermes.apache.org [140.211.11.3]) by mx1-lw-us.apache.org (ASF Mail Server at mx1-lw-us.apache.org) with SMTP id 0FB815FD03 for ; Tue, 28 Jun 2016 16:46:26 +0000 (UTC) Received: (qmail 67278 invoked by uid 99); 28 Jun 2016 16:46:26 -0000 Received: from git1-us-west.apache.org (HELO git1-us-west.apache.org) (140.211.11.23) by apache.org (qpsmtpd/0.29) with ESMTP; Tue, 28 Jun 2016 16:46:26 +0000 Received: by git1-us-west.apache.org (ASF Mail Server at git1-us-west.apache.org, from userid 33) id 5F76FE5720; Tue, 28 Jun 2016 16:46:26 +0000 (UTC) Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: wes3@apache.org To: commits@mynewt.incubator.apache.org Date: Tue, 28 Jun 2016 16:46:32 -0000 Message-Id: <965bf253e23f45b0a36e512117a8abdd@git.apache.org> In-Reply-To: References: X-Mailer: ASF-Git Admin Mailer Subject: [7/9] incubator-mynewt-core git commit: Added BSP for RedBearLabs blenano with MK20 dev board based on nrf51dk archived-at: Tue, 28 Jun 2016 16:46:37 -0000 Added BSP for RedBearLabs blenano with MK20 dev board based on nrf51dk Project: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/repo Commit: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/commit/165f463d Tree: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/tree/165f463d Diff: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/diff/165f463d Branch: refs/heads/develop Commit: 165f463d0d98a7b933ad8cce1d6ba4dceb47b8aa Parents: 8b33108 Author: Jan Rüth Authored: Tue Jun 28 10:08:20 2016 +0200 Committer: Jan Rüth Committed: Tue Jun 28 10:08:20 2016 +0200 ---------------------------------------------------------------------- hw/bsp/nrf51-blenano/boot-nrf51dk.ld | 178 +++++++++++++ hw/bsp/nrf51-blenano/cmsis-dap.cfg | 12 + hw/bsp/nrf51-blenano/include/bsp/bsp.h | 49 ++++ hw/bsp/nrf51-blenano/include/bsp/bsp_sysid.h | 36 +++ hw/bsp/nrf51-blenano/include/bsp/cmsis_nvic.h | 30 +++ hw/bsp/nrf51-blenano/nrf51.cfg | 60 +++++ hw/bsp/nrf51-blenano/nrf51dk.ld | 184 +++++++++++++ hw/bsp/nrf51-blenano/nrf51dk_debug.sh | 47 ++++ hw/bsp/nrf51-blenano/nrf51dk_download.sh | 107 ++++++++ hw/bsp/nrf51-blenano/nrf51dk_no_boot.ld | 179 +++++++++++++ hw/bsp/nrf51-blenano/pkg.yml | 41 +++ .../src/arch/cortex_m0/gcc_startup_nrf51.s | 267 +++++++++++++++++++ hw/bsp/nrf51-blenano/src/hal_bsp.c | 46 ++++ hw/bsp/nrf51-blenano/src/libc_stubs.c | 85 ++++++ hw/bsp/nrf51-blenano/src/os_bsp.c | 78 ++++++ hw/bsp/nrf51-blenano/src/sbrk.c | 53 ++++ hw/bsp/nrf51-blenano/src/system_nrf51.c | 121 +++++++++ 17 files changed, 1573 insertions(+) ---------------------------------------------------------------------- http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/165f463d/hw/bsp/nrf51-blenano/boot-nrf51dk.ld ---------------------------------------------------------------------- diff --git a/hw/bsp/nrf51-blenano/boot-nrf51dk.ld b/hw/bsp/nrf51-blenano/boot-nrf51dk.ld new file mode 100755 index 0000000..1d514a5 --- /dev/null +++ b/hw/bsp/nrf51-blenano/boot-nrf51dk.ld @@ -0,0 +1,178 @@ +/* Linker script for Nordic Semiconductor nRF5 devices + * + * Version: Sourcery G++ 4.5-1 + * Support: https://support.codesourcery.com/GNUToolchain/ + * + * Copyright (c) 2007, 2008, 2009, 2010 CodeSourcery, Inc. + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. + */ +OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x8000 + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __HeapBase + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + * __bssnz_start__ + * __bssnz_end__ + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + __isr_vector_start = .; + KEEP(*(.isr_vector)) + __isr_vector_end = .; + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + *(.eh_frame*) + . = ALIGN(4); + } > FLASH + + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + . = ALIGN(4); + } > FLASH + __exidx_end = .; + + __etext = .; + + .vector_relocation : + { + . = ALIGN(4); + __vector_tbl_reloc__ = .; + . = . + (__isr_vector_end - __isr_vector_start); + . = ALIGN(4); + } > RAM + + .data : AT (__etext) + { + __data_start__ = .; + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + *(.preinit_array) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + *(SORT(.init_array.*)) + *(.init_array) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + *(SORT(.fini_array.*)) + *(.fini_array) + PROVIDE_HIDDEN (__fini_array_end = .); + + *(.jcr) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + } > RAM + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM + + /* Heap starts after BSS */ + __HeapBase = .; + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + *(.stack*) + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Top of head is the bottom of the stack */ + __HeapLimit = __StackLimit; + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__HeapBase <= __HeapLimit, "region RAM overflowed with stack") +} + http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/165f463d/hw/bsp/nrf51-blenano/cmsis-dap.cfg ---------------------------------------------------------------------- diff --git a/hw/bsp/nrf51-blenano/cmsis-dap.cfg b/hw/bsp/nrf51-blenano/cmsis-dap.cfg new file mode 100644 index 0000000..7251280 --- /dev/null +++ b/hw/bsp/nrf51-blenano/cmsis-dap.cfg @@ -0,0 +1,12 @@ +# +# ARM CMSIS-DAP compliant adapter +# +# http://www.keil.com/support/man/docs/dapdebug/ +# + +interface cmsis-dap + +#set WORKAREASIZE 0x2000 + +# Optionally specify the serial number of CMSIS-DAP usb device. +#cmsis_dap_serial 02200201E6661E601B98E3B9 http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/165f463d/hw/bsp/nrf51-blenano/include/bsp/bsp.h ---------------------------------------------------------------------- diff --git a/hw/bsp/nrf51-blenano/include/bsp/bsp.h b/hw/bsp/nrf51-blenano/include/bsp/bsp.h new file mode 100644 index 0000000..520dd67 --- /dev/null +++ b/hw/bsp/nrf51-blenano/include/bsp/bsp.h @@ -0,0 +1,49 @@ +/** + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef H_BSP_H +#define H_BSP_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Define special stackos sections */ +#define sec_data_core __attribute__((section(".data.core"))) +#define sec_bss_core __attribute__((section(".bss.core"))) + +/* More convenient section placement macros. */ +#define bssnz_t + +/* LED pins */ +#define LED_BLINK_PIN (19) + +/* UART info */ +#define CONSOLE_UART 0 + +int bsp_imgr_current_slot(void); + +#define NFFS_AREA_MAX (8) + + +#ifdef __cplusplus +} +#endif + +#endif /* H_BSP_H */ http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/165f463d/hw/bsp/nrf51-blenano/include/bsp/bsp_sysid.h ---------------------------------------------------------------------- diff --git a/hw/bsp/nrf51-blenano/include/bsp/bsp_sysid.h b/hw/bsp/nrf51-blenano/include/bsp/bsp_sysid.h new file mode 100644 index 0000000..7b0a24b --- /dev/null +++ b/hw/bsp/nrf51-blenano/include/bsp/bsp_sysid.h @@ -0,0 +1,36 @@ +/** + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ +#ifndef BSP_SYSID_H +#define BSP_SYSID_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* stub until this BSP gets new HAL */ +enum system_device_id +{ + RESERVED, +}; + +#ifdef __cplusplus +} +#endif + +#endif /* BSP_SYSID_H */ \ No newline at end of file http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/165f463d/hw/bsp/nrf51-blenano/include/bsp/cmsis_nvic.h ---------------------------------------------------------------------- diff --git a/hw/bsp/nrf51-blenano/include/bsp/cmsis_nvic.h b/hw/bsp/nrf51-blenano/include/bsp/cmsis_nvic.h new file mode 100644 index 0000000..fe7fc9a --- /dev/null +++ b/hw/bsp/nrf51-blenano/include/bsp/cmsis_nvic.h @@ -0,0 +1,30 @@ +/* mbed Microcontroller Library - cmsis_nvic + * Copyright (c) 2009-2011 ARM Limited. All rights reserved. + * + * CMSIS-style functionality to support dynamic vectors + */ + +#ifndef MBED_CMSIS_NVIC_H +#define MBED_CMSIS_NVIC_H + +#include + +/* NOTE: the nrf51 SoC has 26 interrupts. */ +#define NVIC_USER_IRQ_OFFSET 16 +#define NVIC_NUM_VECTORS (NVIC_USER_IRQ_OFFSET + 26) + +#include "mcu/nrf51.h" + +#ifdef __cplusplus +extern "C" { +#endif + +void NVIC_Relocate(void); +void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector); +uint32_t NVIC_GetVector(IRQn_Type IRQn); + +#ifdef __cplusplus +} +#endif + +#endif http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/165f463d/hw/bsp/nrf51-blenano/nrf51.cfg ---------------------------------------------------------------------- diff --git a/hw/bsp/nrf51-blenano/nrf51.cfg b/hw/bsp/nrf51-blenano/nrf51.cfg new file mode 100644 index 0000000..280dd4f --- /dev/null +++ b/hw/bsp/nrf51-blenano/nrf51.cfg @@ -0,0 +1,60 @@ +# +# script for Nordic nRF51 series, a Cortex-M0 chip +# + +source [find target/swj-dp.tcl] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME nrf51 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +# Work-area is a space in RAM used for flash programming +# By default use 16kB +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x4000 +} + +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x0bb11477 +} + +swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME + +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +if {![using_hla]} { + # The chip supports standard ARM/Cortex-M0 SYSRESETREQ signal + cortex_m reset_config sysresetreq +} + +flash bank $_CHIPNAME.flash nrf51 0x00000000 0 1 1 $_TARGETNAME +flash bank $_CHIPNAME.uicr nrf51 0x10001000 0 1 1 $_TARGETNAME + +# +# The chip should start up from internal 16Mhz RC, so setting adapter +# clock to 1Mhz should be OK +# +adapter_khz 1000 + +proc enable_all_ram {} { + # nRF51822 Product Anomaly Notice (PAN) #16 explains that not all RAM banks + # are reliably enabled after reset on some revisions (contrary to spec.) So after + # resetting we enable all banks via the RAMON register + mww 0x40000524 0xF +} +$_TARGETNAME configure -event reset-end { enable_all_ram } http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/165f463d/hw/bsp/nrf51-blenano/nrf51dk.ld ---------------------------------------------------------------------- diff --git a/hw/bsp/nrf51-blenano/nrf51dk.ld b/hw/bsp/nrf51-blenano/nrf51dk.ld new file mode 100755 index 0000000..094f2c4 --- /dev/null +++ b/hw/bsp/nrf51-blenano/nrf51dk.ld @@ -0,0 +1,184 @@ +/* Linker script for Nordic Semiconductor nRF5 devices + * + * Version: Sourcery G++ 4.5-1 + * Support: https://support.codesourcery.com/GNUToolchain/ + * + * Copyright (c) 2007, 2008, 2009, 2010 CodeSourcery, Inc. + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. + */ +OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00008000, LENGTH = 0x1b800 + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __HeapBase + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + * __bssnz_start__ + * __bssnz_end__ + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .imghdr (NOLOAD): + { + . = . + 0x20; + } > FLASH + + .text : + { + __isr_vector_start = .; + KEEP(*(.isr_vector)) + __isr_vector_end = .; + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + *(.eh_frame*) + . = ALIGN(4); + } > FLASH + + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + . = ALIGN(4); + } > FLASH + __exidx_end = .; + + __etext = .; + + /* Keep first in RAM, as well as in bootloader */ + .vector_relocation : + { + . = ALIGN(4); + __vector_tbl_reloc__ = .; + . = . + (__isr_vector_end - __isr_vector_start); + . = ALIGN(4); + } > RAM + + .data : AT (__etext) + { + __data_start__ = .; + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + *(.preinit_array) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + *(SORT(.init_array.*)) + *(.init_array) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + *(SORT(.fini_array.*)) + *(.fini_array) + PROVIDE_HIDDEN (__fini_array_end = .); + + *(.jcr) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + } > RAM + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM + + /* Heap starts after BSS */ + __HeapBase = .; + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + *(.stack*) + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Top of head is the bottom of the stack */ + __HeapLimit = __StackLimit; + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__HeapBase <= __HeapLimit, "region RAM overflowed with stack") +} + http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/165f463d/hw/bsp/nrf51-blenano/nrf51dk_debug.sh ---------------------------------------------------------------------- diff --git a/hw/bsp/nrf51-blenano/nrf51dk_debug.sh b/hw/bsp/nrf51-blenano/nrf51dk_debug.sh new file mode 100755 index 0000000..f090129 --- /dev/null +++ b/hw/bsp/nrf51-blenano/nrf51dk_debug.sh @@ -0,0 +1,47 @@ +#!/bin/sh +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# +# Called: $0 [features...] +# - bsp_directory_path is absolute path to hw/bsp/bsp_name +# - binary is the path to prefix to target binary, .elf.bin appended to this +# name is the raw binary format of the binary. +# - features is the project identities string. So you can have e.g. different +# flash offset for bootloader 'feature' +# +# +if [ $# -lt 2 ]; then + echo "Need binary to download" + exit 1 +fi + +MYPATH=$1 +FILE_NAME=$2.elf +GDB_CMD_FILE=.gdb_cmds + +echo "Debugging" $FILE_NAME + +set -m +openocd -s $MYPATH -f cmsis-dap.cfg -f nrf51.cfg -c "nrf51.cpu configure -event gdb-detach {shutdown}" -c init -c "reset halt" & +set +m + +echo "target remote localhost:3333" > $GDB_CMD_FILE + +arm-none-eabi-gdb -x $GDB_CMD_FILE $FILE_NAME + +rm $GDB_CMD_FILE + http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/165f463d/hw/bsp/nrf51-blenano/nrf51dk_download.sh ---------------------------------------------------------------------- diff --git a/hw/bsp/nrf51-blenano/nrf51dk_download.sh b/hw/bsp/nrf51-blenano/nrf51dk_download.sh new file mode 100755 index 0000000..7ba69f2 --- /dev/null +++ b/hw/bsp/nrf51-blenano/nrf51dk_download.sh @@ -0,0 +1,107 @@ +#!/bin/bash +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# +# Called: $0 [features...] +# - bsp_directory_path is absolute path to hw/bsp/bsp_name +# - binary is the path to prefix to target binary, .elf.bin appended to this +# name is the raw binary format of the binary. +# - features is the project features string. So you can have e.g. different +# flash offset for bootloader 'feature' +# +# +if [ $# -lt 2 ]; then + echo "Need binary to download" + exit 1 +fi + +IS_BOOTLOADER=0 +MYPAH=$1 +BASENAME=$2 +#JLINK_SCRIPT=.download.jlink +GDB_CMD_FILE=.gdb_cmds + +# Look for 'bootloader' from 3rd arg onwards +shift +shift +while [ $# -gt 0 ]; do + if [ $1 = "bootloader" ]; then + IS_BOOTLOADER=1 + fi + shift +done + +if [ $IS_BOOTLOADER -eq 1 ]; then + FLASH_OFFSET=0x0 + FILE_NAME=$BASENAME.elf.bin +else + FLASH_OFFSET=0x8000 + FILE_NAME=$BASENAME.img +fi + +echo "Downloading" $FILE_NAME "to" $FLASH_OFFSET + +# XXX for some reason JLinkExe overwrites flash at offset 0 when +# downloading somewhere in the flash. So need to figure out how to tell it +# not to do that, or report failure if gdb fails to write this file +# +echo "shell /bin/sh -c 'trap \"\" 2;openocd -s $MYPAH -f cmsis-dap.cfg -f nrf51.cfg' &" > $GDB_CMD_FILE +echo "target remote localhost:3333" >> $GDB_CMD_FILE +echo "monitor reset halt" >> $GDB_CMD_FILE +echo "monitor flash write_image erase $FILE_NAME $FLASH_OFFSET" >> $GDB_CMD_FILE +echo "monitor reset run" >> $GDB_CMD_FILE +echo "monitor shutdown" >> $GDB_CMD_FILE +echo "quit" >> $GDB_CMD_FILE + +msgs=`arm-none-eabi-gdb -x $GDB_CMD_FILE 2>&1` +echo $msgs > .gdb_out + +rm $GDB_CMD_FILE + +#cat > $JLINK_SCRIPT < FLASH + + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + . = ALIGN(4); + } > FLASH + __exidx_end = .; + + __etext = .; + + /* Keep first in RAM, as well as in bootloader */ + .vector_relocation : + { + . = ALIGN(4); + __vector_tbl_reloc__ = .; + . = . + (__isr_vector_end - __isr_vector_start); + . = ALIGN(4); + } > RAM + + .data : AT (__etext) + { + __data_start__ = .; + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + *(.preinit_array) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + *(SORT(.init_array.*)) + *(.init_array) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + *(SORT(.fini_array.*)) + *(.fini_array) + PROVIDE_HIDDEN (__fini_array_end = .); + + *(.jcr) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + } > RAM + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM + + /* Heap starts after BSS */ + __HeapBase = .; + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + *(.stack*) + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Top of head is the bottom of the stack */ + __HeapLimit = __StackLimit; + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__HeapBase <= __HeapLimit, "region RAM overflowed with stack") +} + http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/165f463d/hw/bsp/nrf51-blenano/pkg.yml ---------------------------------------------------------------------- diff --git a/hw/bsp/nrf51-blenano/pkg.yml b/hw/bsp/nrf51-blenano/pkg.yml new file mode 100644 index 0000000..ea41d92 --- /dev/null +++ b/hw/bsp/nrf51-blenano/pkg.yml @@ -0,0 +1,41 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: hw/bsp/nrf51-blenano +pkg.type: bsp +pkg.description: BSP definition for the RedBearLabs BLE Nano with 32kB flash based on Nordic nRF51. +pkg.author: "Apache Mynewt adapted by Jan Rüth " +pkg.homepage: "http://mynewt.apache.org/" +pkg.keywords: + - nrf51 + - mk20 + - blenano + +pkg.arch: cortex_m0 +pkg.compiler: compiler/arm-none-eabi-m0 +pkg.linkerscript: "nrf51dk.ld" +pkg.linkerscript.bootloader.OVERWRITE: "boot-nrf51dk.ld" +pkg.downloadscript: nrf51dk_download.sh +pkg.debugscript: nrf51dk_debug.sh +pkg.cflags: -DNRF51 +pkg.deps: + - hw/mcu/nordic/nrf51xxx + - libs/baselibc +pkg.deps.BLE_DEVICE: + - net/nimble/drivers/nrf51 http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/165f463d/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51.s ---------------------------------------------------------------------- diff --git a/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51.s new file mode 100755 index 0000000..431849d --- /dev/null +++ b/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51.s @@ -0,0 +1,267 @@ +/* +Copyright (c) 2015, Nordic Semiconductor ASA +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + +* Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +* Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + +* Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +/* +NOTE: Template files (including this one) are application specific and therefore +expected to be copied into the application project folder prior to its use! +*/ + + .syntax unified + .arch armv6-m + + .section .stack + .align 3 + .equ Stack_Size, 432 + .globl __StackTop + .globl __StackLimit +__StackLimit: + .space Stack_Size + .size __StackLimit, . - __StackLimit +__StackTop: + .size __StackTop, . - __StackTop + + .section .heap + .align 3 +#ifdef __HEAP_SIZE + .equ Heap_Size, __HEAP_SIZE +#else + .equ Heap_Size, 0 +#endif + .globl __HeapBase + .globl __HeapLimit +__HeapBase: + .if Heap_Size + .space Heap_Size + .endif + .size __HeapBase, . - __HeapBase +__HeapLimit: + .size __HeapLimit, . - __HeapLimit + + .section .isr_vector + .align 2 + .globl __isr_vector +__isr_vector: + .long __StackTop /* Top of Stack */ + .long Reset_Handler /* Reset Handler */ + .long _NMI_Handler /* NMI Handler */ + .long _HardFault_Handler /* Hard Fault Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long _SVC_Handler /* SVCall Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long _PendSV_Handler /* PendSV Handler */ + .long _SysTick_Handler /* SysTick Handler */ + + /* External Interrupts */ + .long _POWER_CLOCK_IRQHandler + .long _RADIO_IRQHandler + .long _UART0_IRQHandler + .long _SPI0_TWI0_IRQHandler + .long _SPI1_TWI1_IRQHandler + .long 0 /*Reserved */ + .long _GPIOTE_IRQHandler + .long _ADC_IRQHandler + .long _TIMER0_IRQHandler + .long _TIMER1_IRQHandler + .long _TIMER2_IRQHandler + .long _RTC0_IRQHandler + .long _TEMP_IRQHandler + .long _RNG_IRQHandler + .long _ECB_IRQHandler + .long _CCM_AAR_IRQHandler + .long _WDT_IRQHandler + .long _RTC1_IRQHandler + .long _QDEC_IRQHandler + .long _LPCOMP_IRQHandler + .long _SWI0_IRQHandler + .long _SWI1_IRQHandler + .long _SWI2_IRQHandler + .long _SWI3_IRQHandler + .long _SWI4_IRQHandler + .long _SWI5_IRQHandler + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + + .size __isr_vector, . - __isr_vector + +/* Reset Handler */ + + .equ NRF_POWER_RAMON_ADDRESS, 0x40000524 + .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554 + .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3 + + .text + .thumb + .thumb_func + .align 1 + .globl Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + .fnstart + +/* Make sure ALL RAM banks are powered on */ + MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk + + LDR R0, =NRF_POWER_RAMON_ADDRESS + LDR R2, [R0] + ORRS R2, R1 + STR R2, [R0] + + LDR R0, =NRF_POWER_RAMONB_ADDRESS + LDR R2, [R0] + ORRS R2, R1 + STR R2, [R0] + +/* Loop to copy data from read only memory to RAM. The ranges + * of copy from/to are specified by following symbols evaluated in + * linker script. + * __etext: End of code section, i.e., begin of data sections to copy from. + * __data_start__/__data_end__: RAM address range that data should be + * copied to. Both must be aligned to 4 bytes boundary. */ + + ldr r1, =__etext + ldr r2, =__data_start__ + ldr r3, =__data_end__ + + subs r3, r2 + ble .LC0 + +.LC1: + subs r3, 4 + ldr r0, [r1,r3] + str r0, [r2,r3] + bgt .LC1 +.LC0: + + LDR R0, =SystemInit + BLX R0 + LDR R0, =_start + BX R0 + + .pool + .cantunwind + .fnend + .size Reset_Handler,.-Reset_Handler + + .section ".text" + + +/* Dummy Exception Handlers (infinite loops which can be modified) */ + + .weak NMI_Handler + .type NMI_Handler, %function +NMI_Handler: + B . + .size NMI_Handler, . - NMI_Handler + + .weak SVC_Handler + .type SVC_Handler, %function +SVC_Handler: + B . + .size SVC_Handler, . - SVC_Handler + + + .weak PendSV_Handler + .type PendSV_Handler, %function +PendSV_Handler: + B . + .size PendSV_Handler, . - PendSV_Handler + + + .weak SysTick_Handler + .type SysTick_Handler, %function +SysTick_Handler: + B . + .size SysTick_Handler, . - SysTick_Handler + +/* Default handler. This uses the vector in the relocated vector table */ + .globl Default_Handler + .type Default_Handler, %function +Default_Handler: + LDR R2, =__vector_tbl_reloc__ + MRS R0, PSR + MOVS R1, #0x3F + ANDS R0, R1 + LSLS R0, R0, #2 + LDR R0, [R0, R2] + BX R0 + .size Default_Handler, . - Default_Handler + +/* + * All of the following IRQ Handlers will point to the default handler unless + * they are defined elsewhere. + */ + .macro IRQ handler + .weak \handler + .set \handler, Default_Handler + .endm + + IRQ _NMI_Handler + IRQ _HardFault_Handler + IRQ _SVC_Handler + IRQ _PendSV_Handler + IRQ _SysTick_Handler + IRQ _POWER_CLOCK_IRQHandler + IRQ _RADIO_IRQHandler + IRQ _UART0_IRQHandler + IRQ _SPI0_TWI0_IRQHandler + IRQ _SPI1_TWI1_IRQHandler + IRQ _GPIOTE_IRQHandler + IRQ _ADC_IRQHandler + IRQ _TIMER0_IRQHandler + IRQ _TIMER1_IRQHandler + IRQ _TIMER2_IRQHandler + IRQ _RTC0_IRQHandler + IRQ _TEMP_IRQHandler + IRQ _RNG_IRQHandler + IRQ _ECB_IRQHandler + IRQ _CCM_AAR_IRQHandler + IRQ _WDT_IRQHandler + IRQ _RTC1_IRQHandler + IRQ _QDEC_IRQHandler + IRQ _LPCOMP_IRQHandler + IRQ _SWI0_IRQHandler + IRQ _SWI1_IRQHandler + IRQ _SWI2_IRQHandler + IRQ _SWI3_IRQHandler + IRQ _SWI4_IRQHandler + IRQ _SWI5_IRQHandler + + .end http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/165f463d/hw/bsp/nrf51-blenano/src/hal_bsp.c ---------------------------------------------------------------------- diff --git a/hw/bsp/nrf51-blenano/src/hal_bsp.c b/hw/bsp/nrf51-blenano/src/hal_bsp.c new file mode 100644 index 0000000..bfca6f9 --- /dev/null +++ b/hw/bsp/nrf51-blenano/src/hal_bsp.c @@ -0,0 +1,46 @@ +/** + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include +#include +#include "mcu/nrf51_hal.h" + +static const struct nrf51_uart_cfg uart_cfg = { + .suc_pin_tx = 9, + .suc_pin_rx = 11, + .suc_pin_rts = 8, + .suc_pin_cts = 10 +}; + +const struct nrf51_uart_cfg *bsp_uart_config(void) +{ + return &uart_cfg; +} + +const struct hal_flash * +bsp_flash_dev(uint8_t id) +{ + /* + * Internal flash mapped to id 0. + */ + if (id != 0) { + return NULL; + } + return &nrf51_flash_dev; +} http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/165f463d/hw/bsp/nrf51-blenano/src/libc_stubs.c ---------------------------------------------------------------------- diff --git a/hw/bsp/nrf51-blenano/src/libc_stubs.c b/hw/bsp/nrf51-blenano/src/libc_stubs.c new file mode 100644 index 0000000..da54ed1 --- /dev/null +++ b/hw/bsp/nrf51-blenano/src/libc_stubs.c @@ -0,0 +1,85 @@ +/** + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include + +void * _sbrk(int c); +int _close(int fd); +int _fstat(int fd, void *s); +void _exit(int s); +int _kill(int pid, int sig); +int _write(int fd, void *b, int nb); +int _isatty(int c); +int _lseek(int fd, int off, int w); +int _read(int fd, void *b, int nb); +int _getpid(void); + +int +_close(int fd) +{ + return -1; +} + +int +_fstat(int fd, void *s) +{ + return -1; +} + + +void +_exit(int s) +{ + system_reset(); +} + +int +_kill(int pid, int sig) +{ + return -1; +} + +int +_write(int fd, void *b, int nb) +{ + return -1; +} + +int +_isatty(int c) +{ + return -1; +} + +int +_lseek(int fd, int off, int w) +{ + return -1; +} + +int +_read(int fd, void *b, int nb) +{ + return -1; +} + +int +_getpid(void) { + return -1; +} http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/165f463d/hw/bsp/nrf51-blenano/src/os_bsp.c ---------------------------------------------------------------------- diff --git a/hw/bsp/nrf51-blenano/src/os_bsp.c b/hw/bsp/nrf51-blenano/src/os_bsp.c new file mode 100644 index 0000000..2b88f27 --- /dev/null +++ b/hw/bsp/nrf51-blenano/src/os_bsp.c @@ -0,0 +1,78 @@ +/** + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ +#include + +static struct flash_area bsp_flash_areas[] = { + [FLASH_AREA_BOOTLOADER] = { + .fa_flash_id = 0, /* internal flash */ + .fa_off = 0x00000000, /* beginning */ + .fa_size = (32 * 1024) + }, + [FLASH_AREA_IMAGE_0] = { + .fa_flash_id = 0, + .fa_off = 0x00008000, + .fa_size = (110 * 1024) + }, + [FLASH_AREA_IMAGE_1] = { + .fa_flash_id = 0, + .fa_off = 0x00023800, + .fa_size = (110 * 1024) + }, + [FLASH_AREA_IMAGE_SCRATCH] = { + .fa_flash_id = 0, + .fa_off = 0x0003f000, + .fa_size = (2 * 1024) + }, + [FLASH_AREA_NFFS] = { + .fa_flash_id = 0, + .fa_off = 0x0003f800, + .fa_size = (2 * 1024) + } +}; + +void *_sbrk(int incr); +void _close(int fd); + +/* + * Returns the flash map slot where the currently active image is located. + * If executing from internal flash from fixed location, that slot would + * be easy to find. + * If images are in external flash, and copied to RAM for execution, then + * this routine would have to figure out which one of those slots is being + * used. + */ +int +bsp_imgr_current_slot(void) +{ + return FLASH_AREA_IMAGE_0; +} + +void +os_bsp_init(void) +{ + /* + * XXX this reference is here to keep this function in. + */ + _sbrk(0); + _close(0); + + flash_area_init(bsp_flash_areas, + sizeof(bsp_flash_areas) / sizeof(bsp_flash_areas[0])); + +} http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/165f463d/hw/bsp/nrf51-blenano/src/sbrk.c ---------------------------------------------------------------------- diff --git a/hw/bsp/nrf51-blenano/src/sbrk.c b/hw/bsp/nrf51-blenano/src/sbrk.c new file mode 100644 index 0000000..f06d124 --- /dev/null +++ b/hw/bsp/nrf51-blenano/src/sbrk.c @@ -0,0 +1,53 @@ +/** + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include + +extern char __HeapBase; +extern char __HeapLimit; + +static char *brk = &__HeapBase; +void * +_sbrk(int incr) +{ + void *prev_brk; + + if (incr < 0) { + /* Returning memory to the heap. */ + incr = -incr; + if (brk - incr < &__HeapBase) { + prev_brk = (void *)-1; + errno = EINVAL; + } else { + prev_brk = brk; + brk -= incr; + } + } else { + /* Allocating memory from the heap. */ + if (&__HeapLimit - brk >= incr) { + prev_brk = brk; + brk += incr; + } else { + prev_brk = (void *)-1; + errno = ENOMEM; + } + } + + return prev_brk; +} http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/165f463d/hw/bsp/nrf51-blenano/src/system_nrf51.c ---------------------------------------------------------------------- diff --git a/hw/bsp/nrf51-blenano/src/system_nrf51.c b/hw/bsp/nrf51-blenano/src/system_nrf51.c new file mode 100755 index 0000000..2ca31d1 --- /dev/null +++ b/hw/bsp/nrf51-blenano/src/system_nrf51.c @@ -0,0 +1,121 @@ +/* Copyright (c) 2015, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * * Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include +#include +#include "bsp/cmsis_nvic.h" +#include "mcu/nrf.h" +#include "mcu/system_nrf51.h" + +/*lint ++flb "Enter library region" */ + + +#define __SYSTEM_CLOCK (16000000UL) /*!< nRF51 devices use a fixed System Clock Frequency of 16MHz */ + +static bool is_manual_peripheral_setup_needed(void); +static bool is_disabled_in_debug_needed(void); + + +#if defined ( __CC_ARM ) + uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK; +#elif defined ( __ICCARM__ ) + __root uint32_t SystemCoreClock = __SYSTEM_CLOCK; +#elif defined ( __GNUC__ ) + uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK; +#endif + +void SystemCoreClockUpdate(void) +{ + SystemCoreClock = __SYSTEM_CLOCK; +} + +void SystemInit(void) +{ + /* If desired, switch off the unused RAM to lower consumption by the use of RAMON register. + It can also be done in the application main() function. */ + + /* Prepare the peripherals for use as indicated by the PAN 26 "System: Manual setup is required + to enable the use of peripherals" found at Product Anomaly document for your device found at + https://www.nordicsemi.com/. The side effect of executing these instructions in the devices + that do not need it is that the new peripherals in the second generation devices (LPCOMP for + example) will not be available. */ + if (is_manual_peripheral_setup_needed()) + { + *(uint32_t volatile *)0x40000504 = 0xC007FFDF; + *(uint32_t volatile *)0x40006C18 = 0x00008000; + } + + /* Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG + register is incorrect" found at Product Anomaly document four your device found at + https://www.nordicsemi.com/. There is no side effect of using these instruction if not needed. */ + if (is_disabled_in_debug_needed()) + { + NRF_MPU->DISABLEINDEBUG = MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos; + } + + NVIC_Relocate(); +} + + +static bool is_manual_peripheral_setup_needed(void) +{ + if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)) + { + if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x00) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0)) + { + return true; + } + if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x10) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0)) + { + return true; + } + if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0)) + { + return true; + } + } + + return false; +} + +static bool is_disabled_in_debug_needed(void) +{ + if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)) + { + if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0)) + { + return true; + } + } + + return false; +} + +/*lint --flb "Leave library region" */