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From "Dan Hecht (Code Review)" <ger...@cloudera.org>
Subject [Impala-CR](cdh5-trunk) Allow compiler to use SSE3 and SSSE3 instructions.
Date Fri, 03 Jun 2016 00:26:40 GMT
Dan Hecht has posted comments on this change.

Change subject: Allow compiler to use SSE3 and SSSE3 instructions.
......................................................................


Patch Set 2:

> > > > Aren't these already on by default?  I'm pretty sure impalad
 > > ends
 > > > > up with SSSE3 instructions.  What's the default -march for
 > our
 > > > > toolchain gcc?
 > > >
 > > > I checked by using an SSE3 Intel Intrisic without adding this
 > > > compiler option. It caused the build to fail with "target
 > > specific
 > > > option mismatch"
 > >
 > > SSE3 shouldn't be enabled but SSSE3 might be.  But it might not
 > be.
 > >
 > > However, what's the motivation for this change?  Do you see a
 > > tangible benefit?  We could do it, but there might be some Impala
 > > users out there running on AMD Bulldozer (2011) even though we
 > > technically require SSSE3.
 > 
 > The purpose is to make byte shuffles and unaligned 16-byte SIMD
 > loads available for use with some of the SIMD optimizations that
 > are being done by the Intel contributors.

I see.  See IMPALA-1646 and IMPALA-1399 for some examples of CPUs that Impala would no longer
run after making this change.  While we never went back and claimed support for pre-SSSE3,
it probably does work today.  Could you check with Justin to make sure he's okay with really
no longer working on these CPUs?

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Gerrit-MessageType: comment
Gerrit-Change-Id: Ib045e00b5aa71cc6ef16dbda160bfdc7b765158a
Gerrit-PatchSet: 2
Gerrit-Project: Impala
Gerrit-Branch: cdh5-trunk
Gerrit-Owner: Jim Apple <jbapple@cloudera.com>
Gerrit-Reviewer: Dan Hecht <dhecht@cloudera.com>
Gerrit-Reviewer: Jim Apple <jbapple@cloudera.com>
Gerrit-Reviewer: Tim Armstrong <tarmstrong@cloudera.com>
Gerrit-HasComments: No

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