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Subject More about MSVC versus Borland build rules...
Date Wed, 21 Jun 2000 04:29:18 GMT

Bill ( Wrowe )...
Kevin Kiley here...

This is a follow-up to previous message about MSVC default
build rules needing to change for Borland...

See comments following the reprint of previous message...
>  The reason you are only getting this...
>  bcc /c sourcefile.c
>  During your build has to do with the default build
>  rules kicking in.
>  regex.mak is a good example.
>  It has a dependency list but no build instructions
>  so it relies on the 'default' build rule.
>  When I said that -N increases MAKE.EXE compatibility with
>  NMAKE.EXE to the point where it won't crap out on the
>  MSVC default build rules that didn't mean those rules
>  will actually work.
>  Somehow the Perl script needs to comment out ( or erase )
>  the default MSVC build rule for .C and .OBJ and substitute 
>  the Borland one...
>  # MSVC default build rule
>  #.c{$(CPP_OBJS)}.obj:
>  #   $(CPP) @<<
>  #   $(CPP_PROJ) $<
>  #<<
>  # Borland default build rule that works for Apache makefiles...
>  .c.obj:
>    $(CPP) -o$(OUTDIR)\{$&}.obj $(CPP_PROJ) $<
>  The above is just the way I do it but there are lots 
>  of ways to skin the cat... the key is that the MSVC
>  stuff will probably NEVER work due to differences
>  in the interpretation of all the makefile symbols
>  such as @ and <<
>  You SHOULD be able to leave the -o option in your
>  CPP_PROJ like you have it and it should still work
>  but that's not the way I normally do it so I haven't
>  checked.
>  Borland uses the  {$&} to supply the name of the build
>  target without any partiular extension on it so you can
>  specify your own.


When there ARE some build rules associated with the SOURCE=foo.obj
build target listing ( as is the case with ApacheCore.mak and Apache.mak )
then the flaky MSVC default build rules section with all the whacked
out @<< piping doesn't matter... MAKE.EXE will use the rules
associated with the target instead... but you still have the same

Example from Apache.mak...


#"$(INTDIR)\main_win32.obj" : $(SOURCE) "$(INTDIR)"
#    $(CPP) $(CPP_PROJ) $(SOURCE)

# Borland
"$(INTDIR)\main_win32.obj" :
    $(CPP) -o$(OUTDIR)\$&.obj $(CPP_PROJ) .\os\win32\main_win32.c

You still have to 'clean-up' the MSVC build rules for each target

A lot of this has to do with the way MSVC can understand the
double-colons after a target entry but Borland cannot.

In the same way... Borland MAKE.EXE has trouble with the
$(SOURCE) "$(INTDIR)" entries ( or anything? ) following the 
colon on a target list line.

The above example is not the only way to make it fly but
it works.

I don't use the 'SOURCE=foo.obj' like you are trying to preserve
from the originals but as long as the names are unique then they 
should work within the build rule as long as it doesn't gang-up onto 
the same line with the colon that declares the build target.

Kevin Kiley
CTO, Remote Communications, Inc. - Online Internet Compression Server

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