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From "Sai Teja Ranuva (JIRA)" <j...@apache.org>
Subject [jira] [Comment Edited] (HBASE-14070) Hybrid Logical Clocks for HBase
Date Tue, 19 Jul 2016 21:43:20 GMT

    [ https://issues.apache.org/jira/browse/HBASE-14070?page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel&focusedCommentId=15384889#comment-15384889
] 

Sai Teja Ranuva edited comment on HBASE-14070 at 7/19/16 9:42 PM:
------------------------------------------------------------------

[~enis] [~stack]
Is there a reason why we are introducing System Monotonic clock apart from HLC clock ?
Do we need it anywhere specifically ? Can we not use HLC in places where we might use System
Monotonic ? I feel it might be better to have clock implementations that will be used. 



was (Author: saitejar):
[~enis] [~stack]
Is there a reason why we are introducing System Monotonic clock apart from HLC clock ?
Do we need it anywhere specifically ? Can we not use HLC in places where we might System Monotonic
? I feel it might be better to have clock implementations that will be used. 


> Hybrid Logical Clocks for HBase
> -------------------------------
>
>                 Key: HBASE-14070
>                 URL: https://issues.apache.org/jira/browse/HBASE-14070
>             Project: HBase
>          Issue Type: New Feature
>            Reporter: Enis Soztutar
>            Assignee: Sai Teja Ranuva
>         Attachments: HybridLogicalClocksforHBaseandPhoenix.docx, HybridLogicalClocksforHBaseandPhoenix.pdf
>
>
> HBase and Phoenix uses systems physical clock (PT) to give timestamps to events (read
and writes). This works mostly when the system clock is strictly monotonically increasing
and there is no cross-dependency between servers clocks. However we know that leap seconds,
general clock skew and clock drift are in fact real. 
> This jira proposes using Hybrid Logical Clocks (HLC) as an implementation of hybrid physical
clock + a logical clock. HLC is best of both worlds where it keeps causality relationship
similar to logical clocks, but still is compatible with NTP based physical system clock. HLC
can be represented in 64bits. 
> A design document is attached and also can be found here: 
> https://docs.google.com/document/d/1LL2GAodiYi0waBz5ODGL4LDT4e_bXy8P9h6kWC05Bhw/edit#



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