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Date: Fri, 24 Jul 2015 00:32:07 +0000 (UTC)
From: "Enis Soztutar (JIRA)" <jira@apache.org>
To: issues@hbase.apache.org
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Subject: [jira] [Commented] (HBASE-14070) Hybrid Logical Clocks for HBase
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    [ https://issues.apache.org/jira/browse/HBASE-14070?page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel&focusedCommentId=14639735#comment-14639735 ] 

Enis Soztutar commented on HBASE-14070:
---------------------------------------

bq. What about replication? Are we trying to order events between clusters? I assume we won't: On the sink we just apply edits at the timestamps at which they happened, which may be in the past. So I think replication does not need special consideration.
Sorry I missed this. For replication, the timestamps from cells should just update the Clock of the node. In that case, there is no special handling. Since we always carry the PT+LT components in the timestamps with cells, it is just a matter of doing a receive event per cell in writes from replication. 


> Hybrid Logical Clocks for HBase
> -------------------------------
>
>                 Key: HBASE-14070
>                 URL: https://issues.apache.org/jira/browse/HBASE-14070
>             Project: HBase
>          Issue Type: New Feature
>            Reporter: Enis Soztutar
>            Assignee: Enis Soztutar
>         Attachments: HybridLogicalClocksforHBaseandPhoenix.docx, HybridLogicalClocksforHBaseandPhoenix.pdf
>
>
> HBase and Phoenix uses systems physical clock (PT) to give timestamps to events (read and writes). This works mostly when the system clock is strictly monotonically increasing and there is no cross-dependency between servers clocks. However we know that leap seconds, general clock skew and clock drift are in fact real. 
> This jira proposes using Hybrid Logical Clocks (HLC) as an implementation of hybrid physical clock + a logical clock. HLC is best of both worlds where it keeps causality relationship similar to logical clocks, but still is compatible with NTP based physical system clock. HLC can be represented in 64bits. 
> A design document is attached and also can be found here: 
> https://docs.google.com/document/d/1LL2GAodiYi0waBz5ODGL4LDT4e_bXy8P9h6kWC05Bhw/edit#


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