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From Egor Pasko <egor.pa...@gmail.com>
Subject Re: [drlvm][jit] Instoptimizer in MemoryValueNumberingPass
Date Mon, 19 May 2008 04:35:25 GMT
On the 0x444 day of Apache Harmony Simon Chow wrote:
> Thanks Egor,
> Modifier mod(Modifier(inst->getAutoCompressModifier()) |
> Modifier(Speculative_No) );
> 
> ^^^^^^^^^^^^^^^^^^^^^^^^^^^
> setHashToInst(inst, getKey(Operation(Op_TauLdInd, inst->getType(), mod),
> addrOp->getId()));
> 
> Why does it use Modifier(Speculative_No) instead of
> inst->getSpeculativeModifier()? is this pass does not optimise 'Speculative
> Load'?

Simon, sorry for the late answer, these two weeks I am far from home.

Speculative loads are exactly the same as ordinary loads on x86 and
x86_64, so, you should not care about it much.

I am not sure why we are doing this. Here is my guess: in terms of
load op elimination there is no difference between a speculative or a
non-speculative load. So, we are fixing the operation in the hash so
that it matches both variants. I did not check this, however.

> Thanks
> 
> 2008/5/14 Egor Pasko <egor.pasko@gmail.com>:
> 
> > On the 0x444 day of Apache Harmony Simon Chow wrote:
> > > Egor,
> > > Thank you every much, it is very helpful.
> > > AFAIK, only write barrier has been implemented in harmony, my goal is
> > > implementing read barrier for gen GC and concurrent GC,
> >
> > yes, we only have write barriers now
> >
> > > As a result, a command option such as generate_read_barrier=true/false
> > is
> > > added to DRLVM.
> > > If it is true, GC use information intercepted by read barrier to perform
> > gen
> > > or concurrent collection instead of using write barrier.
> > > Maybe the performance will not be better than write barrier, but I think
> > it
> > > is a good practice to understand the internal of both JIT and GC, do you
> > > think so?
> >
> > yes, both a good practice and a good experiment. Good luck!
> >
> > > 2008/5/13 Egor Pasko <egor.pasko@gmail.com>:
> > >
> > > > On the 0x442 day of Apache Harmony Simon Chow wrote:
> > > > > Hi all
> > > > > I am trying to add read barriers mechanism in DRLVM ( just for
> > practice
> > > > :=)
> > > > > )
> > > > > As the first step, I am inserting read barrier inst in HIR,
> > > > > I define a new modifier set like this:
> > > > > enum LoadModifier {
> > > > >     Load_NoReadBarrier       = 0x1 << 27,
> > > > >     Load_ReadBarrier       = 0x2 << 27,
> > > > >     Load_Mask         = 0x3 << 27,
> > > > >     LoadModifier_IsShiftedBy = 27,
> > > > >     LoadModifier_BitsToEncode = 1,
> > > > >     LoadModifier_BitsConsumed = 2
> > > > > };
> > > > > it will be used in TauLdInd.
> > > >
> > > > you want to optimise some barriers out, right?
> > > > looks good
> > > >
> > > > > My question is about Instoptimizer of MemoryValueNumberingPass, I
am
> > not
> > > > > familiar with it.
> > > > > First,
> > > > > What is this pass mainly used for?
> > > >
> > > > MemOpt is used to eliminate unnecessary store+load pairs. It puts
> > > > corresponding operations into a hash. Then eliminates loads if sees
> > > > loads in this hash.
> > > >
> > > > > Second,
> > > > > In the caseTauStInd case of the switch in dispatch method:
> > > > >
> > > > > Modifier mod(Modifier(inst->getAutoCompressModifier()) |
> > > > > Modifier(Speculative_No) );
> > > > > setHashToInst(inst, getKey(Operation(Op_TauLdInd, inst->getType(),
> > mod),
> > > > > addrOp->getId()));
> > > > >
> > > > > What does it do here? Why is Op_TauLdInd  used in a caseTauStInd
> > case?
> > > >
> > > > load operation is stored as if it is there. So, if you have a new load
> > > > op you search if there is the same one in the hash.
> > > >
> > >
> > > Why does it use Modifier(Speculative_No) instead of
> > > inst->getSpeculativeModifier() ?
> > > Thanks
> > >
> > >
> > > > --
> > > > Egor Pasko
> > > >
> > > >
> > >
> > >
> > > --
> > > From : Simon.Chow@Software School of Fudan University
> >
> > --
> > Egor Pasko
> >
> >
> 
> 
> -- 
> From : Simon.Chow@Software School of Fudan University

-- 
Egor Pasko


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