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Subject: RE: problem under windows
Date: Thu, 24 May 2007 11:05:23 -0700
Message-ID: 
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In-Reply-To: 
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Thread-Topic: problem under windows
thread-index: Aced46PsDwziCRaoQbyVpFFZ8lYTlQAPloNAAAL/i+A=
References: <20070522151222.B67E.MMM@projectumbra.org>
 <B0095134066CC94FBC80973103FFA1FE03FA6928@orsmsx416.amr.corp.intel.com>
 <20070523003314.B683.MMM@projectumbra.org>
 <B0095134066CC94FBC80973103FFA1FE03FA6D33@orsmsx416.amr.corp.intel.com>
 <B0095134066CC94FBC80973103FFA1FE03FA70A0@orsmsx416.amr.corp.intel.com>
 <bc79dd600705240203s16f7d834n6117fbc4456232b6@mail.gmail.com>
 <bc79dd600705240211k3248bb4eya886ed600fe653c8@mail.gmail.com>
 <B0095134066CC94FBC80973103FFA1FE03FE3367@orsmsx416.amr.corp.intel.com>
From: "Elford, Chris L" <chris.l.elford@intel.com>
To: <dev@harmony.apache.org>

FYI, I have created http://issues.apache.org/jira/browse/HARMONY-3961
To reflect this desired behavior.

Regards,
Chris Elford
Intel SSG/Enterprise Solutions Software Division

-----Original Message-----
From: Elford, Chris L [mailto:chris.l.elford@intel.com]=20
Sent: Thursday, May 24, 2007 9:46 AM
To: dev@harmony.apache.org
Subject: RE: problem under windows

Interesting.  Its good to hear that some thought has been given to P3
class systems.  I would think /arch:SSE would be okay.  This would let
us run on both P3s and Athlon (like the one that Michael was trying to
run on) which support both MMX and SSE but not SSE2.

Is there a compiler option that generates back-off MMX code on platforms
that don't support SSE or SSE2 instructions?  If so, it would result in
larger executables and might impact code locality but it might be a good
tradeoff.

Regards,

Chris Elford
Intel SSG/Enterprise Solutions Software Division

-----Original Message-----
From: Mikhail Fursov [mailto:mike.fursov@gmail.com]=20
Sent: Thursday, May 24, 2007 2:12 AM
To: dev@harmony.apache.org
Subject: Re: problem under windows

Well, it looks like we need to remove this line from jitrino.dll build
configuration for 32bit platform.
                <compilerarg value=3D"/arch:SSE2" />

On 5/24/07, Mikhail Fursov <mike.fursov@gmail.com> wrote:
>
> On 5/24/07, Elford, Chris L <chris.l.elford@intel.com> wrote:
> >
> > Hi all,
> >
> >   I tracked down a system that has SSE but not SSE2 (a dual
processor P3
> > system).  For me, adding "-xe ii" to the ntsd command line let the
> > debugger break in at the first chance exception.  It reports that
what I
> >
> > believe is an SSE2 instruction does indeed happen during jitrino.dll
> > startup.
> >
> > 01365fb0 f20f100520553901 movsd xmm0,qword ptr
> > [jitrino!JIT_gc_start+0xd5810 (01395520)]
> >
> > Without jitrino symbol information ( e.g., a pdb file for
jitrino.dll),
> > its hard to tell what function is being executed (it is unlikely
that it
> > is JIT_gc_start.  It would be nice if the snapshot builds included
> > symbol files to help make for more meaningful stack traces.
> >
> > It may be good to discuss [again?] on the lists whether more people
can
> > come into the project to help create legacy modes that earlier
> > instruction sets (and earlier Oses) can still execute without
crippling
> > current instruction set processors (and/or OSes).
> >
> > I don't see an open JIRA about this one.  The closest I see is
> > http://issues.apache.org/jira/browse/HARMONY-3246 which is more
about
> > code that the JIT creates rather than the JIT itself.
> >
> > Ntsd log below showing more detail around faulting instruction.
> > Mikhail?
>
>
> You're right that we fixed Jitrino.OPT to generate SSE independent
code
> (use x87) if SSE2 is not available.
> Another JIRA (not commited yet):
http://issues.apache.org/jira/browse/HARMONY-3737
> makes JET to compile all methods without FPU insts (>90% of methods)
and
> pass other methods to OPT
> I checked dumpbin /disasm for jitrino.dll and see a lot of SSE/SSE2
insts
> in code.
>
> It's possible that our compiler options for jitrino.dll are too
> aggressive. I will check it and report.
>
> --
> Mikhail Fursov


--=20
Mikhail Fursov