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From "Mikhail Fursov" <mike.fur...@gmail.com>
Subject Re: [jitrino][profile]how to use EdgeProfiler
Date Mon, 02 Apr 2007 06:34:40 GMT
On 4/1/07, Estelle Liu <lyy1105@gmail.com> wrote:
>
> Hi, Mikhail,
> Thanks for your advice , and it works.
> So is there any limitation for entryThreshold and backedgeThreshold, i.e,
> can they be reduced to any  positive value?


Yes, you can put them both == 1. I use this configuration sometimes to test
server mode.

It seems when I reduce both ten
> times, some access collision arises.


Do you mean that profile is changing when you access it from compilation?
Yes, this is a normal situation.


2007/3/31, Mikhail Fursov <mike.fursov@gmail.com>:
> >
> > Estelle,
> > AFAIR
> > "edge_annotate" assigns -1 to every edge by default before applying
> > profile.
> > If there are any incompatibilities/wrong mapping of counters you have
> the
> > assertion you've got: -  negative counters value.
> > The error in your configuration could be here:
> > -XDjit.CD_OPT.path.optimizer
> > =ssa,devirt,inline,uce,purge,simplify,dce,uce,edge_instrument
> > -XDjit.CD_OPT2.path.optimizer=ssa
> > ,devirt,inline,uce,purge,simplify,dce,uce,edge_annotate
> > inline path depends on runtime application state (like initialization
> > order).
> >
> > I suggest you
> > 1) moving inline optimization pass after instrumentation/annotation.
> (What
> > is the reason to do inlining without profile?)
> > 2) Check that you use the latest SVN version (HARMONY-3464 fixes very
> > similar edge profiler issue)
> > 3) Compare CFG before instrumentation and annotation: these graphs must
> be
> > equal.
> >
> >
> >
> >
> > On 3/31/07, Estelle Liu <lyy1105@gmail.com> wrote:
> > >
> > > Hi,all,
> > > I wrote a configure file and used an edge profiler. Assertion error
> > occurs
> > > when running  simple bytecode such as HelloWorld.
> > > The error  is:
> > > File: ...\jitrino\dynopt\EdgeProfiler.cpp
> > > Line: 266
> > > Expression: edgeFreq >= 0
> > >
> > > It seems edgeFreq is negative,but why? Is my configure file something
> > > wrong?
> > >
> > > My configure file is as follow:
> > >
> > > chains=chain1,chain2
> > > chain1.jits=JET_CLINIT
> > > chain2.jits=CD_OPT,CD_OPT2
> > > chain1.filter=+::<clinit>
> > > chain1.filter=-
> > >
> > > JET_CLINIT.file=jitrino
> > > CD_OPT.file=jitrino
> > > CD_OPT2.file=jitrino
> > >
> > > #Confuguration of profile collector and recompilation
> > > EDGE_PROF.profilerType=EDGE_PROFILER
> > > EDGE_PROF.entryThreshold=10000
> > > EDGE_PROF.backedgeThreshold=40000
> > > EDGE_PROF.tbsTimeout=10
> > > EDGE_PROF.tbsInitialTimeout=0
> > > CD_OPT.genProfile=EDGE_PROF
> > > CD_OPT2.useProfile=EDGE_PROF
> > >
> > > # configuration of JET_CLINIT
> > > -XDjit.JET_CLINIT.path=
> > >
> > > #configuration of CD_OPT
> > > -XDjit.CD_OPT.path=opt_init,translator,optimizer,hir2lir,codegen
> > > -XDjit.CD_OPT.path.optimizer=ssa
> > ,devirt,inline,uce,purge,simplify,dce,uce,
> > > edge_instrument
> > > ,lazyexc,memopt,simplify,dce,uce,lower,dessa,statprof,markglobals
> > > -XDjit.CD_OPT.path.codegen=lock_method
> > >
> > >
> >
> ,bbp,btr,gcpoints,cafl,dce1,i8l,api_magic,early_prop,peephole,itrace-,native,constraints,dce2,regalloc,spillgen,layout,copy,rce+,stack,break-,iprof-,peephole,emitter!,si_insts,gcmap,info,unlock_method
> > > -XDjit.CD_OPT.path.dce1=cg_dce
> > > -XDjit.CD_OPT.path.dce2=cg_dce
> > > -XDjit.CD_OPT.path.regalloc=bp_regalloc1,bp_regalloc2
> > > -XDjit.CD_OPT.path.bp_regalloc1=bp_regalloc
> > > -XDjit.CD_OPT.path.bp_regalloc2=bp_regalloc
> > > #inliner configuration of CD_OPT
> > > -XDjit.CD_OPT.CD_OPT_inliner_pipeline.filter=-
> > > -XDjit.CD_OPT.CD_OPT_inliner_pipeline.path=ssa,devirt
> > > -XDjit.CD_OPT.arg.optimizer.inline.pipeline=CD_OPT_inliner_pipeline
> > > -XDjit.CD_OPT.arg.codegen.dce1.early=yes
> > > -XDjit.CD_OPT.arg.codegen.regalloc.bp_regalloc1.regs=ALL_GP
> > > -XDjit.CD_OPT.arg.codegen.regalloc.bp_regalloc2.regs=ALL_XMM
> > > -XDjit.CD_OPT.arg.codegen.btr.insertCMOVs=no
> > > -XDjit.CD_OPT.arg.codegen.btr.removeConstCompare=yes
> > >
> > > #configuration of CD_OPT2
> > > -XDjit.CD_OPT2.path=opt_init,translator,optimizer,hir2lir,codegen
> > > -XDjit.CD_OPT2.path.optimizer=ssa
> > > ,devirt,inline,uce,purge,simplify,dce,uce,
> > > edge_annotate
> > > ,lazyexc,memopt,simplify,dce,uce,lower,dessa,statprof,markglobals
> > > -XDjit.CD_OPT2.path.codegen=lock_method
> > >
> > >
> >
> ,bbp,btr,gcpoints,cafl,dce1,i8l,api_magic,early_prop,peephole,itrace-,native,constraints,dce2,regalloc,spillgen,layout,copy,rce+,stack,break-,iprof-,peephole,emitter!,si_insts,gcmap,info,unlock_method
> > > -XDjit.CD_OPT2.path.dce1=cg_dce
> > > -XDjit.CD_OPT2.path.dce2=cg_dce
> > > -XDjit.CD_OPT2.path.regalloc=bp_regalloc1,bp_regalloc2
> > > -XDjit.CD_OPT2.path.bp_regalloc1=bp_regalloc
> > > -XDjit.CD_OPT2.path.bp_regalloc2=bp_regalloc
> > > #inliner configuration of CD_OPT2
> > > -XDjit.CD_OPT2.CD_OPT2_inliner_pipeline.filter=-
> > > -XDjit.CD_OPT2.CD_OPT2_inliner_pipeline.path=ssa,devirt
> > > -XDjit.CD_OPT2.arg.optimizer.inline.pipeline=CD_OPT2_inliner_pipeline
> > > -XDjit.CD_OPT2.arg.codegen.dce1.early=yes
> > > -XDjit.CD_OPT2.arg.codegen.regalloc.bp_regalloc1.regs=ALL_GP
> > > -XDjit.CD_OPT2.arg.codegen.regalloc.bp_regalloc2.regs=ALL_XMM
> > > -XDjit.CD_OPT2.arg.codegen.btr.insertCMOVs=no
> > > -XDjit.CD_OPT2.arg.codegen.btr.removeConstCompare=yes
> > > -XDjit.arg.codegen.emitter.align=4
> > >
> > > #system properties
> > > -Djava.compiler=client
> > >
> > >
> > >
> > > Thanks!
> > > --
> > > Estelle
> > >
> >
> >
> >
> > --
> > Mikhail Fursov
> >
>
>
>
> --
> Estelle
>



-- 
Mikhail Fursov

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