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From "Rana Dasgupta" <rdasg...@gmail.com>
Subject Re: [drlvm] tests failing on linux (Ubuntu 7.04-dev) with Quad Xeon P3
Date Mon, 02 Apr 2007 16:30:20 GMT
Mikhail,
    Nathan is hitting an "mfence", is this available on PIII?

Rana


On 4/2/07, Mikhail Fursov <mike.fursov@gmail.com> wrote:
> On 4/1/07, Rana Dasgupta <rdasgupt@gmail.com> wrote:
> >
> > On 3/31/07, Gregory Shimansky <gshimansky@gmail.com> wrote:
> > > Nathan Beyer wrote:
> > > > On 3/30/07, Nathan Beyer <ndbeyer@apache.org> wrote:
> > > > Okay, I'm trying that out now. Can the JIT be a little smarter and not
> > > >use instructions that aren't available? We certainly can't limit
> > > > available platforms to P4 or newer.
> > >
> > > I hope JIT gurus can answer this. I know that JIT can use x87 stack
> > > instead of SSE for floating point, but other P4 specific instructions
> > > may still be present in the code. I know at least one place in DRLVM
> > > where mfence, sfence and lfence are used explicitly in inline assembly.
> > >
> > We have had these discussions before when discussing JIT plans etc. We
> > did discuss that the floating point operations generated by jitrino,
> > as contributed, uses sse2 and that porting to the x87 stack was a TBD.
>
>
> With http://issues.apache.org/jira/browse/HARMONY-3246 commited JIT (
> Jitrino.OPT only) is able to use x87 instructions. I know no other JIT
> limitations and think that Jitrino is P3 ready (at least -Xem:opt mode)
>
>
> For those who have P3 hardware: please tell us about any problems you have
> with JIT. I just do not have such an old environment in reach.
>
> --
> Mikhail Fursov
>

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