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From Archie Cobbs <arc...@dellroad.org>
Subject Re: Changes to bootjvm 0.0.0 coming soon
Date Tue, 18 Oct 2005 14:06:33 GMT
Rodrigo Kumpera wrote:
> This won´t help to find the spots that require memory barriers, as
> these are only an issue on SMP systems. But your idea should not be
> discarded as it may help with other kinds of problems.

Good point.. interesting question how you could check that too..
perhaps for multi-CPU systems you'd want to insert random length
delay loops (instead of context switches) or something. A context
swith would probably result in indirect flushing of the CPU state
anwyay, effectively the same as a barrier between every instruction.


Archie Cobbs      *        CTO, Awarix        *      http://www.awarix.com

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