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From hinde...@apache.org
Subject svn commit: r957042 [2/3] - in /harmony/enhanced/java/branches/mrh: common_resources/depends/build/platform/ drlvm/modules/vm/src/main/native/em/unix/ drlvm/modules/vm/src/main/native/encoder/shared/x86/ drlvm/modules/vm/src/main/native/encoder/unix/ d...
Date Tue, 22 Jun 2010 21:43:59 GMT
Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32BBPolling.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32BBPolling.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32BBPolling.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32BBPolling.cpp Tue Jun 22 21:43:55 2010
@@ -261,7 +261,7 @@ BBPolling::getOrCreateTLSBaseReg(Edge* e
 
     Type* tlsBaseType = irManager.getTypeManager().getUnmanagedPtrType(irManager.getTypeManager().getIntPtrType());
 
-#ifdef _EM64T_
+#ifdef HYX86_64
     tlsBaseReg = irManager.newOpnd(tlsBaseType, Constraint(OpndKind_GPReg));
 #else
     tlsBaseReg = irManager.newOpnd(tlsBaseType, Constraint(RegName_EAX)|

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32BCMap.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32BCMap.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32BCMap.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32BCMap.h Tue Jun 22 21:43:55 2010
@@ -19,8 +19,8 @@
 * @author Intel, Vitaly N. Chaiko
 */
 
-#ifndef _IA32_BC_MAP_H_
-#define _IA32_BC_MAP_H_
+#ifndef HYX86BC_MAP_H_
+#define HYX86BC_MAP_H_
 
 #include "Stl.h"
 #include "MemoryManager.h"
@@ -105,4 +105,4 @@ private:
 
 }} //namespace
 
-#endif /* _IA32_BC_MAP_H_ */
+#endif /* HYX86BC_MAP_H_ */

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CFG.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CFG.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CFG.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CFG.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Intel, Vyacheslav P. Shakin, Mikhail Y. Fursov
  */
 
-#ifndef _IA32_CFG_H_
-#define _IA32_CFG_H_
+#ifndef HYX86CFG_H_
+#define HYX86CFG_H_
 
 #include "ControlFlowGraph.h"
 #include "MemoryManager.h"
@@ -161,4 +161,4 @@ namespace Ia32{
 
 }; //namespace Ia32
 }
-#endif // _IA32_FLOWGRAPH_H
+#endif // HYX86FLOWGRAPH_H

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CallingConvention.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CallingConvention.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CallingConvention.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CallingConvention.cpp Tue Jun 22 21:43:55 2010
@@ -55,7 +55,7 @@ MultiArrayCallingConvention     CallingC
 // STDCALLCallingConvention
 //========================================================================================
 
-#ifdef _EM64T_
+#ifdef HYX86_64
 #ifdef _WIN64
 const RegName fastCallGPRegs[4] = {RegName_RCX, RegName_RDX, RegName_R8, RegName_R9} ;
 const RegName fastCallFPRegs[4] = {RegName_XMM0,RegName_XMM1,RegName_XMM2,RegName_XMM3};
@@ -65,7 +65,7 @@ const RegName fastCallFPRegs[8] = {RegNa
 #endif
 #endif
 
-#ifdef _IA32_
+#ifdef HYX86
 //______________________________________________________________________________________
 void STDCALLCallingConventionIA32::getOpndInfo(ArgKind kind, U_32 count, OpndInfo * infos) const
 {
@@ -180,7 +180,7 @@ void STDCALLCallingConventionEM64T::getO
 }
 #endif
 
-#ifdef _IA32_
+#ifdef HYX86
 //______________________________________________________________________________________
 Constraint STDCALLCallingConventionIA32::getCalleeSavedRegs(OpndKind regKind) const
 {
@@ -210,7 +210,7 @@ Constraint STDCALLCallingConventionEM64T
 
 
 //______________________________________________________________________________________
-#ifdef _IA32_
+#ifdef HYX86
 void ManagedCallingConventionIA32::getOpndInfo(ArgKind kind, U_32 count, OpndInfo * infos) const
 {
     if (kind == ArgKind_RetArg) {
@@ -235,7 +235,7 @@ void ManagedCallingConventionIA32::getOp
 #else
 #endif
 
-#ifdef _IA32_
+#ifdef HYX86
 #else
 void MultiArrayCallingConventionEM64T::getOpndInfo(ArgKind kind, U_32 count, OpndInfo * infos) const
 {

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CallingConvention.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CallingConvention.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CallingConvention.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CallingConvention.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Vyacheslav P. Shakin
  */
 
-#ifndef _IA32_CALLING_CONVENTION_H_
-#define _IA32_CALLING_CONVENTION_H_
+#ifndef HYX86CALLING_CONVENTION_H_
+#define HYX86CALLING_CONVENTION_H_
 
 #include "open/types.h"
 #include "Type.h"
@@ -43,7 +43,7 @@
 #define STACK_ALIGN16         (0x00000010)
 
 
-#ifdef _EM64T_
+#ifdef HYX86_64
     #define STACK_REG RegName_RSP
     #define STACK_ALIGNMENT STACK_ALIGN_HALF16  
 #else
@@ -223,7 +223,7 @@ public:
     virtual void    getOpndInfo(ArgKind kind, U_32 argCount, OpndInfo * infos) const;
 };
 
-#ifdef _EM64T_
+#ifdef HYX86_64
 typedef STDCALLCallingConventionEM64T       STDCALLCallingConvention;
 typedef CDECLCallingConventionEM64T         CDECLCallingConvention;
 typedef ManagedCallingConventionEM64T       ManagedCallingConvention;

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CgUtils.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CgUtils.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CgUtils.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CgUtils.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Alexander Astapchuk
  */
 
-#if !defined(__IA32_CGUTILS_INCLUDED__)
-#define __IA32_CGUTILS_INCLUDED__
+#if !defined(_HYX86CGUTILS_INCLUDED__)
+#define _HYX86CGUTILS_INCLUDED__
 
 #include "Ia32IRManager.h"
 
@@ -295,4 +295,4 @@ private:
 
 }}; // ~namespace Jitrino::Ia32
 
-#endif  // ~ifndef __IA32_CGUTILS_INCLUDED__
+#endif  // ~ifndef _HYX86CGUTILS_INCLUDED__

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeEmitter.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeEmitter.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeEmitter.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeEmitter.cpp Tue Jun 22 21:43:55 2010
@@ -197,7 +197,7 @@ void CodeEmitter::ConstantAreaLayout::co
         Opnd::RuntimeInfo * ri=NULL;
         if (opnd->isPlacedIn(OpndKind_Mem)&&opnd->getMemOpndKind()==MemOpndKind_ConstantArea){
             Opnd * addrOpnd=opnd->getMemOpndSubOpnd(MemOpndSubOpndKind_Displacement);
-#ifndef _EM64T_
+#ifndef HYX86_64
             ri=addrOpnd->getRuntimeInfo();
             assert(ri->getKind()==Opnd::RuntimeInfo::Kind_ConstantAreaItem);
 #else
@@ -512,7 +512,7 @@ void CodeEmitter::emitCode( void ) {
                     // the last two
                     ip = (U_8*)EncoderBase::nops((char*)ip,2);
                 }
-#ifdef _EM64T_
+#ifdef HYX86_64
                     // these nops are required for call transformation from immediate into register form
                     // nops for MOV r11, callTarget (when !fit32(call_offset) ) <opcode + 8 byte address>
                     ip = (U_8*)EncoderBase::nops((char*)ip, 10);
@@ -641,7 +641,7 @@ void CodeEmitter::postPass()
                 } else 
                     continue;
                 int64 offset=targetCodeStartAddr-instCodeEndAddr;
-#ifdef _EM64T_
+#ifdef HYX86_64
                 if ( !fit32(offset) ) { // offset is not a signed value that fits into 32 bits
                     // this is for direct calls only
                     assert(inst->hasKind(Inst::Kind_CallInst));
@@ -721,7 +721,7 @@ bool RuntimeInterface::recompiledMethodE
     // we can not guarantee the (callAddr+1) aligned
     // self-jump is a kind of lock for the time of call patching
     U_32 movSize =
-#ifdef _EM64T_
+#ifdef HYX86_64
                      10;
 #else
                      0; // no additional MOV on ia32
@@ -750,7 +750,7 @@ bool RuntimeInterface::recompiledMethodE
 
     // The patching itself
 
-#ifdef _EM64T_
+#ifdef HYX86_64
     bool registerCallIsBeingPatched = ( 0xB8 == (0xF8 &(*(movAddr+1))) ); // test opcode (&0xF8 - to skip rd bits)
 
     EncoderBase::Operands args;

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeGeneratorFlags.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeGeneratorFlags.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeGeneratorFlags.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeGeneratorFlags.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
 * @author Vyacheslav P. Shakin
 */
 
-#ifndef _IA32_CODE_GENERATORFLAGS_
-#define _IA32_CODE_GENERATORFLAGS_
+#ifndef HYX86CODE_GENERATORFLAGS_
+#define HYX86CODE_GENERATORFLAGS_
 
 namespace Jitrino
 {

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeLayout.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeLayout.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeLayout.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeLayout.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Intel, Mikhail Y. Fursov
  */
 
-#ifndef _IA32_CODE_LAYOUT
-#define _IA32_CODE_LAYOUT
+#ifndef HYX86CODE_LAYOUT
+#define HYX86CODE_LAYOUT
 
 
 #include "Ia32IRManager.h"

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeLayoutBottomUp.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeLayoutBottomUp.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeLayoutBottomUp.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeLayoutBottomUp.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Intel, Mikhail Y. Fursov
  */
 
-#ifndef _IA32_CODE_LAYOUT_BOTTOM_UP
-#define _IA32_CODE_LAYOUT_BOTTOM_UP
+#ifndef HYX86CODE_LAYOUT_BOTTOM_UP
+#define HYX86CODE_LAYOUT_BOTTOM_UP
 
 #include "Ia32CodeLayout.h"
 namespace Jitrino

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeLayoutTopDown.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeLayoutTopDown.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeLayoutTopDown.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeLayoutTopDown.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Intel, Mikhail Y. Fursov
  */
 
-#ifndef _IA32_CODE_LAYOUT_TOP_DOWN
-#define _IA32_CODE_LAYOUT_TOP_DOWN
+#ifndef HYX86CODE_LAYOUT_TOP_DOWN
+#define HYX86CODE_LAYOUT_TOP_DOWN
 
 #include "Ia32CodeLayout.h"
 namespace Jitrino

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeSelector.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeSelector.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeSelector.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CodeSelector.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Vyacheslav P. Shakin
  */
 
-#ifndef _IA32_CODE_SELECTOR_H_
-#define _IA32_CODE_SELECTOR_H_
+#ifndef HYX86CODE_SELECTOR_H_
+#define HYX86CODE_SELECTOR_H_
 
 #include "Stl.h"
 #include "CodeGenIntfc.h"
@@ -233,4 +233,4 @@ private:
 }; //namespace Ia32
 }
 
-#endif // _IA32_CODE_SELECTOR_H_
+#endif // HYX86CODE_SELECTOR_H_

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32ComplexAddrFormLoader.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32ComplexAddrFormLoader.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32ComplexAddrFormLoader.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32ComplexAddrFormLoader.cpp Tue Jun 22 21:43:55 2010
@@ -185,7 +185,7 @@ ComplexAddrFormLoader::walkThroughOpnds(
             return;
         } else if(src2->isPlacedIn(OpndKind_Imm)) {
             irManager->resolveRuntimeInfo(src2);
-#ifdef _EM64T_
+#ifdef HYX86_64
             if((src2->getImmValue() > (int64)0x7FFFFFFF) || (src2->getImmValue() < -((int64)0x10000000))) {
                 table.baseOp = table.suspOp;
                 return;

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Constraint.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Constraint.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Constraint.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Constraint.cpp Tue Jun 22 21:43:55 2010
@@ -85,7 +85,7 @@ OpndSize Constraint::getDefaultSize(U_32
             case OpndKind_SReg:         return OpndSize_16;
             case OpndKind_FPReg:        return OpndSize_80;
             case OpndKind_XMMReg:       return OpndSize_128;
-#ifdef _EM64T_
+#ifdef HYX86_64
             case OpndKind_GPReg:        return OpndSize_64;
 #else
             case OpndKind_GPReg:        return OpndSize_32;
@@ -114,14 +114,14 @@ Constraint Constraint::getAliasConstrain
     U_32 newKind=kind, newMask=0;
     U_32 newRegKind=newKind & OpndKind_Reg;
     OpndSize maxSubregisterSize =
-#ifdef _EM64T_
+#ifdef HYX86_64
                                     OpndSize_32;
 #else
                                     OpndSize_16;
 #endif
 
     if (newRegKind == OpndKind_GPReg || ( (newRegKind & OpndKind_GPReg) && sz <= maxSubregisterSize) ){
-#ifndef _EM64T_
+#ifndef HYX86_64
         if (sz==OpndSize_8 && (s==OpndSize_16 || s==OpndSize_32))
             newMask=((mask>>4)|mask)&0xf;
         else if (sz==OpndSize_16)
@@ -155,7 +155,7 @@ RegName Constraint::getAliasRegName(RegN
     OpndKind regKind=getRegKind(regName);
 
     if (regKind==OpndKind_GPReg){
-#ifndef _EM64T_
+#ifndef HYX86_64
         if (sz==OpndSize_8 && (s==OpndSize_16 || s==OpndSize_32)){
             U_32 idx=getRegIndex(regName);
             if (idx>4)

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Constraint.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Constraint.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Constraint.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Constraint.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Vyacheslav P. Shakin
  */
 
-#ifndef _IA32_CONSTRAINT_H_
-#define _IA32_CONSTRAINT_H_
+#ifndef HYX86CONSTRAINT_H_
+#define HYX86CONSTRAINT_H_
 
 #include "open/types.h"
 #include "Ia32IRConstants.h"

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CopyExpansion.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CopyExpansion.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CopyExpansion.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32CopyExpansion.cpp Tue Jun 22 21:43:55 2010
@@ -411,7 +411,7 @@ void CopyExpansion::runImpl()
                             if (toOpnd->getRegName()==fromOpnd->getRegName())
                                 continue;
                         }else{
-#ifdef _EM64T_
+#ifdef HYX86_64
                             if (!calculatingRegUsage && ((toOpnd->isPlacedIn(OpndKind_Mem) && fromOpnd->isPlacedIn(OpndKind_Mem))||fromOpnd->isPlacedIn(OpndKind_Imm))){
 #else
                             if (!calculatingRegUsage && ((toOpnd->isPlacedIn(OpndKind_Mem) && fromOpnd->isPlacedIn(OpndKind_Mem))||(toOpnd->isPlacedIn(OpndKind_Reg) && fromOpnd->isPlacedIn(OpndKind_Imm)))){
@@ -422,7 +422,7 @@ void CopyExpansion::runImpl()
                         }
                         copySequence = irManager->newCopySequence(Mnemonic_MOV, toOpnd, fromOpnd, gpRegUsageMask, flagsRegUsageMask);
                     }else if (mn==Mnemonic_PUSH||mn==Mnemonic_POP){
-#ifdef _EM64T_
+#ifdef HYX86_64
                         if (!calculatingRegUsage && (inst->getOpnd(0)->isPlacedIn(OpndKind_Mem)||inst->getOpnd(0)->isPlacedIn(OpndKind_Imm))){
 #else
                         if (!calculatingRegUsage && inst->getOpnd(0)->isPlacedIn(OpndKind_Mem)){

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Encoder.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Encoder.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Encoder.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Encoder.cpp Tue Jun 22 21:43:55 2010
@@ -28,7 +28,7 @@
 namespace Jitrino {
 namespace Ia32 {
 
-#ifdef _EM64T_
+#ifdef HYX86_64
     //FIXME64: for adapter needs
     static bool is_ptr_type(const Type* typ) {
         switch(typ->tag) {
@@ -51,7 +51,7 @@ namespace Ia32 {
         }
         return false;
     }
-#endif  // _EM64T_
+#endif  // HYX86_64
 
 static InstPrefix getInstPrefixFromSReg(RegName reg) {
     if (reg == RegName_Null) {
@@ -246,7 +246,7 @@ U_8* Encoder::emit(U_8* stream, const In
                 }
                 RegName baseReg = pbase == NULL ? RegName_Null : pbase->getRegName();
                 RegName indexReg = pindex == NULL ? RegName_Null : pindex->getRegName();
-#ifdef _EM64T_
+#ifdef HYX86_64
                 // FIXME64 adapter: all PTR types go as 64 bits
                 // this is a porting quick workaround, should be fixed
                 assert(pdisp == NULL || fit32(disp));

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Encoder.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Encoder.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Encoder.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Encoder.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Vyacheslav P. Shakin
  */
 
-#ifndef _IA32_ENCODER_H_
-#define _IA32_ENCODER_H_
+#ifndef HYX86ENCODER_H_
+#define HYX86ENCODER_H_
 
 #include "open/types.h"
 #include "Stl.h"

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32FastArrayFilling.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32FastArrayFilling.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32FastArrayFilling.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32FastArrayFilling.cpp Tue Jun 22 21:43:55 2010
@@ -119,7 +119,7 @@ FastArrayFilling::runImpl() 
         //insert filling instructions 
         Opnd * memOp1 = irManager->newMemOpndAutoKind(value->getType(), index);
         loopNode->appendInst(irManager->newCopyPseudoInst(Mnemonic_MOV, memOp1, value));
-#ifndef _EM64T_
+#ifndef HYX86_64
         Opnd * memOp2 = irManager->newMemOpndAutoKind(value->getType(), index,irManager->newImmOpnd(int32Type,4));
         loopNode->appendInst(irManager->newCopyPseudoInst(Mnemonic_MOV, memOp2, value));
 #endif

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32GCMap.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32GCMap.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32GCMap.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32GCMap.cpp Tue Jun 22 21:43:55 2010
@@ -131,7 +131,7 @@ static void checkManaged2UnmanagedConv(I
                 bool res = isUnmanagedFieldPtr(managedOpnd);
                 if (!res) {
                     Log::out()<<"GCMap::checkManaged2UnmanagedConv failure, managedOpnd="<<managedOpnd->getFirstId()<<std::endl;
-#ifdef _IA32_
+#ifdef HYX86
                     // FIXME em64t
 // TODO: Fails with genIdentityHashCode=true
 //                    assert(0);
@@ -188,13 +188,13 @@ void  GCMap::registerGCSafePoint(IRManag
         MPtrPair* pair = GCSafePointsInfo::findPairByMPtrOpnd(pairs, opnd);
         I_32 offset = pair == NULL ? 0 : pair->getOffset();
         bool isObject = offset == 0;
-#ifdef _EM64T_
+#ifdef HYX86_64
         bool isCompressed = (opnd->getType()->tag <= Type::CompressedVTablePtr && opnd->getType()->tag >= Type::CompressedSystemObject);
 #endif
         GCSafePointOpnd* gcOpnd;
         RegName reg = opnd->getRegName();
         if (reg != RegName_Null) {
-#ifdef _EM64T_
+#ifdef HYX86_64
             gcOpnd = new (mm) GCSafePointOpnd(isObject, TRUE, U_32(reg), offset, isCompressed);
 #else
             gcOpnd = new (mm) GCSafePointOpnd(isObject, TRUE, U_32(reg), offset);
@@ -460,7 +460,7 @@ void GCSafePoint::enumerate(GCInterface*
 #ifdef ENABLE_GC_RT_CHECKS
             GCMap::checkObject(tm, *(void**)valPtrAddr);
 #endif
-#ifdef _EM64T_
+#ifdef HYX86_64
             if(gcOpnd->isCompressed())
                 gcInterface->enumerateCompressedRootReference((U_32*)valPtrAddr);
             else
@@ -487,7 +487,7 @@ POINTER_SIZE_INT GCSafePoint::getOpndSav
         addr = (POINTER_SIZE_INT)stackPtr;
     } else { 
         assert(gcOpnd->isOnStack());
-#ifdef _EM64T_
+#ifdef HYX86_64
         addr = ctx->rsp + (POINTER_SIZE_INT)gcOpnd->getDistFromInstESP();
 #else
         addr = ctx->esp + gcOpnd->getDistFromInstESP();
@@ -527,7 +527,7 @@ void RuntimeInterface::getGCRootSet(Meth
     U_32 stackInfoSize = (U_32)StackInfo::getByteSize(methodDesc);
     U_8* infoBlock = methodDesc->getInfoBlock();
     U_8* gcBlock = infoBlock + stackInfoSize;
-#ifdef _EM64T_
+#ifdef HYX86_64
     const POINTER_SIZE_INT* gcPointImage = GCMap::findGCSafePointStart((POINTER_SIZE_INT*)gcBlock, *context->p_rip);
 #else
     const POINTER_SIZE_INT* gcPointImage = GCMap::findGCSafePointStart((POINTER_SIZE_INT*)gcBlock, *context->p_eip);
@@ -539,7 +539,7 @@ void RuntimeInterface::getGCRootSet(Meth
             //this is a performance filter for empty points 
             // and debug filter for hardware exception point that have no stack info assigned.
             StackInfo stackInfo(mm);
-#ifdef _EM64T_
+#ifdef HYX86_64
             stackInfo.read(methodDesc, *context->p_rip, false);
 #else
             stackInfo.read(methodDesc, *context->p_eip, false);

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32GCMap.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32GCMap.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32GCMap.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32GCMap.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Intel, Mikhail Y. Fursov
  */
 
-#ifndef _IA32_GC_MAP_H_
-#define _IA32_GC_MAP_H_
+#ifndef HYX86GC_MAP_H_
+#define HYX86GC_MAP_H_
 
 #include "Stl.h"
 #include "MemoryManager.h"
@@ -105,7 +105,7 @@ namespace Ia32 {
         friend class GCSafePoint;
         static const U_32 OBJ_MASK  = 0x1;
         static const U_32 REG_MASK  = 0x2;
-#ifdef _EM64T_
+#ifdef HYX86_64
         static const U_32 COMPRESSED_MASK  = 0x4;
 #endif
 
@@ -119,7 +119,7 @@ namespace Ia32 {
 
     public:
         
-#ifdef _EM64T_
+#ifdef HYX86_64
         GCSafePointOpnd(bool isObject, bool isOnRegister, I_32 _val, I_32 _mptrOffset, bool isCompressed=false) : val(_val), mptrOffset(_mptrOffset) {
             flags = flags | (isCompressed ? COMPRESSED_MASK: 0);
 #else
@@ -138,7 +138,7 @@ namespace Ia32 {
         bool isOnRegister() const { return (flags & REG_MASK)!=0;}
         bool isOnStack() const {return !isOnRegister();}
         
-#ifdef _EM64T_
+#ifdef HYX86_64
         bool isCompressed() const { return (flags & COMPRESSED_MASK)!=0;}
 #endif      
         RegName getRegName() const { assert(isOnRegister()); return RegName(val);}
@@ -178,4 +178,4 @@ namespace Ia32 {
 
 }} //namespace
 
-#endif /* _IA32_GC_MAP_H_ */
+#endif /* HYX86GC_MAP_H_ */

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32GCSafePoints.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32GCSafePoints.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32GCSafePoints.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32GCSafePoints.cpp Tue Jun 22 21:43:55 2010
@@ -328,7 +328,7 @@ static inline int adjustOffsets(I_32 off
 
 static bool isHeapBase(Opnd* immOpnd) {
     assert(immOpnd->isPlacedIn(OpndKind_Imm));
-#ifndef _EM64T_
+#ifndef HYX86_64
     return false;
 #else 
     int64 heapBase = (int64)VMInterface::getHeapBase();

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32GCSafePoints.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32GCSafePoints.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32GCSafePoints.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32GCSafePoints.h Tue Jun 22 21:43:55 2010
@@ -19,8 +19,8 @@
  */
 
 
-#ifndef _IA32_GC_SAFE_POINTS_H_
-#define _IA32_GC_SAFE_POINTS_H_
+#ifndef HYX86GC_SAFE_POINTS_H_
+#define HYX86GC_SAFE_POINTS_H_
 
 #include "Ia32IRManager.h"
 namespace Jitrino

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32IRConstants.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32IRConstants.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32IRConstants.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32IRConstants.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Vyacheslav P. Shakin
  */
 
-#ifndef _IA32_IR_CONSTANTS_H_
-#define _IA32_IR_CONSTANTS_H_
+#ifndef HYX86IR_CONSTANTS_H_
+#define HYX86IR_CONSTANTS_H_
 
 #include "open/types.h"
 #include "Stl.h"

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32IRManager.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32IRManager.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32IRManager.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32IRManager.cpp Tue Jun 22 21:43:55 2010
@@ -167,7 +167,7 @@ Opnd * IRManager::newFPConstantMemOpnd(f
 {
     ConstantAreaItem * item=newConstantAreaItem(f);
     Opnd * addr=newImmOpnd(typeManager.getUnmanagedPtrType(typeManager.getSingleType()), Opnd::RuntimeInfo::Kind_ConstantAreaItem, item);
-#ifdef _EM64T_
+#ifdef HYX86_64
     bb->appendInst(newCopyPseudoInst(Mnemonic_MOV, baseOpnd, addr));
     return newMemOpndAutoKind(typeManager.getSingleType(), MemOpndKind_ConstantArea, baseOpnd);
 #else
@@ -180,7 +180,7 @@ Opnd * IRManager::newFPConstantMemOpnd(d
 {
     ConstantAreaItem * item=newConstantAreaItem(d);
     Opnd * addr=newImmOpnd(typeManager.getUnmanagedPtrType(typeManager.getDoubleType()), Opnd::RuntimeInfo::Kind_ConstantAreaItem, item);
-#ifdef _EM64T_
+#ifdef HYX86_64
     bb->appendInst(newCopyPseudoInst(Mnemonic_MOV, baseOpnd, addr));
     return newMemOpndAutoKind(typeManager.getDoubleType(), MemOpndKind_ConstantArea, baseOpnd);
 #else
@@ -213,7 +213,7 @@ SwitchInst * IRManager::newSwitchInst(U_
     // so it allows to replace an Opnd (used in SpillGen) and keep the table 
     // itself intact.
     Opnd * tableAddr=newImmOpnd(typeManager.getIntPtrType(), Opnd::RuntimeInfo::Kind_ConstantAreaItem, item);
-#ifndef _EM64T_
+#ifndef HYX86_64
     Opnd * targetOpnd = newMemOpnd(typeManager.getIntPtrType(), 
         MemOpndKind_ConstantArea, 0, index, newImmOpnd(typeManager.getInt32Type(), sizeof(POINTER_SIZE_INT)), tableAddr);
 #else
@@ -983,7 +983,7 @@ Inst * IRManager::newMemMovSequence(Opnd
     RegName tmpRegName=RegName_Null, unusedTmpRegName=RegName_Null;
     bool registerSetNotLocked = !isRegisterSetLocked(OpndKind_GPReg);
 
-#ifdef _EM64T_
+#ifdef HYX86_64
     for (U_32 reg = RegName_RAX; reg<=RegName_R15/*(U_32)(targetOpnd->getSize()<OpndSize_64?RegName_RBX:RegName_RDI)*/; reg++) {
 #else
     for (U_32 reg = RegName_EAX; reg<=(U_32)(targetOpnd->getSize()<OpndSize_32?RegName_EBX:RegName_EDI); reg++) {
@@ -1053,7 +1053,7 @@ Inst * IRManager::newCopySequence(Opnd *
     OpndKind targetKind=(OpndKind)targetConstraint.getKind();
     OpndKind sourceKind=(OpndKind)sourceConstraint.getKind();
 
-#if defined(_DEBUG) || !defined(_EM64T_)
+#if defined(_DEBUG) || !defined(HYX86_64)
     OpndSize targetSize=targetConstraint.getSize();
     assert(targetSize<=sourceSize); // only same size or truncating conversions are allowed
 #endif
@@ -1064,7 +1064,7 @@ Inst * IRManager::newCopySequence(Opnd *
             return newInst(Mnemonic_XOR,targetOpnd, targetOpnd);
         }
         else if (targetKind==OpndKind_XMMReg && sourceOpnd->getMemOpndKind()==MemOpndKind_ConstantArea) {
-#ifdef _EM64T_
+#ifdef HYX86_64
             Opnd * addr = NULL;
             Opnd * base = sourceOpnd->getMemOpndSubOpnd(MemOpndSubOpndKind_Base);
             if(base) {
@@ -1109,7 +1109,7 @@ Inst * IRManager::newCopySequence(Opnd *
     ){
         if (sourceKind==OpndKind_Mem && targetKind==OpndKind_Mem){
             Inst * instList=NULL;
-#ifndef _EM64T_
+#ifndef HYX86_64
             U_32 targetByteSize=getByteSize(targetSize);
             if (sourceByteSize<=4){
                 instList=newMemMovSequence(targetOpnd, sourceOpnd, regUsageMask);
@@ -1134,7 +1134,7 @@ Inst * IRManager::newCopySequence(Opnd *
             assert(instList!=NULL);
             return instList;
         }else{
-#ifdef _EM64T_
+#ifdef HYX86_64
             if((targetOpnd->getMemOpndKind() == MemOpndKind_StackAutoLayout) && (sourceKind==OpndKind_Imm) && (sourceOpnd->getSize() == OpndSize_64)) 
                 return newMemMovSequence(targetOpnd, sourceOpnd, regUsageMask, false);
             else 
@@ -1205,7 +1205,7 @@ Inst * IRManager::newPushPopSequence(Mne
 
     Inst * instList=NULL;
 
-#ifdef _EM64T_
+#ifdef HYX86_64
     if ( ((kind==OpndKind_GPReg ||kind==OpndKind_Mem)&& size!=OpndSize_32)||(kind==OpndKind_Imm && size<OpndSize_32)){
             return newInst(mn, opnd);
 #else
@@ -1233,7 +1233,7 @@ Inst * IRManager::newPushPopSequence(Mne
     }
     Opnd * espOpnd=getRegOpnd(STACK_REG);
     Opnd * tmp=newMemOpnd(opnd->getType(), MemOpndKind_StackManualLayout, espOpnd, 0); 
-#ifdef _EM64T_
+#ifdef HYX86_64
     Opnd * sizeOpnd=newImmOpnd(typeManager.getInt32Type(), sizeof(POINTER_SIZE_INT));
     if(kind==OpndKind_Imm) {
         assert(mn==Mnemonic_PUSH);
@@ -1309,7 +1309,7 @@ Opnd * IRManager::getRegOpnd(RegName reg
     assert(getRegSize(regName)==Constraint::getDefaultSize(getRegKind(regName))); // are we going to change this?
     U_32 idx=( (getRegKind(regName) & 0x1f) << 4 ) | ( getRegIndex(regName)&0xf );
     if (!regOpnds[idx]){
-#ifdef _EM64T_
+#ifdef HYX86_64
         Type * t = (getRegSize(regName) == OpndSize_64 ? typeManager.getUInt64Type() : typeManager.getUInt32Type());
         regOpnds[idx]=newRegOpnd(t, regName);
 #else
@@ -1326,7 +1326,7 @@ void IRManager::calculateTotalRegUsage(O
         if (opnd->isPlacedIn(regKind)) {
             RegName reg = opnd->getRegName();
             unsigned mask = getRegMask(reg);
-#if !defined(_EM64T_)
+#if !defined(HYX86_64)
             if ((reg == RegName_AH) || (reg == RegName_CH) || (reg == RegName_DH) || (reg == RegName_BH))
                 mask >>= 4;
 #endif
@@ -1392,7 +1392,7 @@ OpndSize IRManager::getTypeSize(Type::Ta
         case Type::Char:
             size = OpndSize_16;
             break;
-#ifndef _EM64T_
+#ifndef HYX86_64
         case Type::IntPtr:   
         case Type::UIntPtr:   
 #endif
@@ -1400,7 +1400,7 @@ OpndSize IRManager::getTypeSize(Type::Ta
         case Type::UInt32:
             size = OpndSize_32;
             break;
-#ifdef _EM64T_
+#ifdef HYX86_64
         case Type::IntPtr:   
         case Type::UIntPtr:   
 #endif
@@ -1418,7 +1418,7 @@ OpndSize IRManager::getTypeSize(Type::Ta
             size = OpndSize_80;
             break;
         default:
-#ifdef _EM64T_
+#ifdef HYX86_64
             size = (tag>=Type::CompressedSystemObject && tag<=Type::CompressedVTablePtr)?OpndSize_32:OpndSize_64;
 #else
             size = OpndSize_32;
@@ -1559,7 +1559,7 @@ void IRManager::calculateLivenessInfo()
                 {
                     BitSet * exitLs  = node->getLiveAtEntry();
                     EntryPointPseudoInst * entryPointInst = getEntryPointInst();
-#ifdef _EM64T_
+#ifdef HYX86_64
                     Opnd * thisOpnd  = entryPointInst->thisOpnd;
                     //on EM64T 'this' opnd is spilled to stack only after finalizeCallSites call (copy expansion pass)
                     //TODO: do it after code selector and tune early propagation and regalloc to skip this opnd from optimizations.
@@ -1708,7 +1708,7 @@ void IRManager::resetOpndConstraints()
 
 void IRManager::finalizeCallSites()
 {
-#ifdef _EM64T_
+#ifdef HYX86_64
     MethodDesc& md = getMethodDesc();
     if (!md.isStatic() 
             && (md.isSynchronized() || md.isParentClassIsLikelyExceptionType())) {
@@ -1911,7 +1911,7 @@ void IRManager::expandSystemExceptions(U
                     assert(dispatchEdge!=NULL);
                     Node* dispatchNode= dispatchEdge->getTargetNode();
                     if ((dispatchNode!=fg->getUnwindNode()) ||(checkOpnds[opnd] == (POINTER_SIZE_INT)-1
-#ifdef _EM64T_
+#ifdef HYX86_64
                             ||!Type::isCompressedReference(opnd->getType()->tag)
 #endif
                             )){
@@ -1966,7 +1966,7 @@ void IRManager::throwException(ObjectTyp
 
     assert(excType);
 
-#ifdef _EM64T_
+#ifdef HYX86_64
     bool lazy = false;
 #else
     bool lazy = true;
@@ -2302,7 +2302,7 @@ bool IRManager::verifyHeapAddressTypes()
                 if (subOpnd!=NULL){
                     Type * type=subOpnd->getType();
                     if (type->isManagedPtr() || type->isObject() || type->isMethodPtr() || type->isVTablePtr() || type->isUnmanagedPtr()
-#ifdef _EM64T_
+#ifdef HYX86_64
                         || subOpnd->getRegName() == RegName_RSP/*SOE handler*/
 #else
                         || subOpnd->getRegName() == RegName_ESP/*SOE handler*/

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32IRManager.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32IRManager.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32IRManager.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32IRManager.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Vyacheslav P. Shakin
  */
 
-#ifndef _IA32_IRMANAGER_H_
-#define _IA32_IRMANAGER_H_
+#ifndef HYX86IRMANAGER_H_
+#define HYX86IRMANAGER_H_
 
 #include "open/types.h"
 #include "Stl.h"

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Inst.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Inst.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Inst.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Inst.cpp Tue Jun 22 21:43:55 2010
@@ -905,7 +905,7 @@ void CallingConventionClient::layoutAuxi
 //   class EntryPointPseudoInst
 //=========================================================================================================
 EntryPointPseudoInst::EntryPointPseudoInst(IRManager * irm, int id, const CallingConvention * cc)
-#ifdef _EM64T_
+#ifdef HYX86_64
     : Inst(Mnemonic_NULL, id, Inst::Form_Extended), thisOpnd(0), callingConventionClient(irm->getMemoryManager(), cc)
 #else
     : Inst(Mnemonic_NULL, id, Inst::Form_Extended), callingConventionClient(irm->getMemoryManager(), cc)

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Inst.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Inst.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Inst.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Inst.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Vyacheslav P. Shakin
  */
 
-#ifndef _IA32_INST_H_
-#define _IA32_INST_H_
+#ifndef HYX86INST_H_
+#define HYX86INST_H_
 
 #include "open/types.h"
 #include "Stl.h"
@@ -1306,7 +1306,7 @@ public:
 
     virtual bool hasSideEffect()const { return true; }
 
-#ifdef _EM64T_
+#ifdef HYX86_64
     Opnd * thisOpnd;
 #endif
     //--------------------------------------------------------------------

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InstCodeSelector.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InstCodeSelector.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InstCodeSelector.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InstCodeSelector.cpp Tue Jun 22 21:43:55 2010
@@ -302,7 +302,7 @@ void InstCodeSelector::opndMaybeGlobal(C
 void InstCodeSelector::copyOpndTrivialOrTruncatingConversion(Opnd *dst, Opnd *src) 
 { 
     assert(dst->getSize()<=src->getSize());
-#ifndef _EM64T_
+#ifndef HYX86_64
     if (src->getType()->isInteger()&&src->getSize()==OpndSize_64)
         appendInsts(irManager.newI8PseudoInst(Mnemonic_MOV, 1, dst, src));
     else
@@ -353,7 +353,7 @@ Opnd * InstCodeSelector::convertIntToInt
     }else{
         if (dstOpnd==NULL)
             dstOpnd=irManager.newOpnd(dstType);
-#ifdef _EM64T_
+#ifdef HYX86_64
             appendInsts(irManager.newInstEx(srcType->isSignedInteger() & !isZeroExtend ? Mnemonic_MOVSX:Mnemonic_MOVZX, 1, dstOpnd, srcOpnd));
 #else
         if (dstSize<OpndSize_64){
@@ -389,7 +389,7 @@ Opnd * InstCodeSelector::convertIntToFp(
             appendInsts(convInst);
         } else { 
             //use FPU to convert long to float/double on IA32 platform
-#ifdef _EM64T_
+#ifdef HYX86_64
             Opnd* int64Opnd = srcOpnd;
 #else  //32 bit mode - use memory aliasing for 64bit opnd
             //copy i8 to stack first
@@ -491,7 +491,7 @@ Opnd * InstCodeSelector::convertToUnmana
         if (srcSize == dstSize) {
             appendInsts(irManager.newCopyPseudoInst(Mnemonic_MOV, dstOpnd, srcOpnd));
         } else {
-#ifdef _EM64T_
+#ifdef HYX86_64
             if (srcType->isInteger()) {
                 appendInsts(irManager.newInstEx(isZeroExtend?Mnemonic_MOVZX:Mnemonic_MOVSX, 1, dstOpnd, srcOpnd)); 
             }       
@@ -527,7 +527,7 @@ Opnd * InstCodeSelector::convertUnmanage
             copyOpndTrivialOrTruncatingConversion(dstOpnd, srcOpnd);
         } else {
             assert(dstSize==OpndSize_64);
-#ifdef _EM64T_
+#ifdef HYX86_64
             appendInsts(irManager.newInstEx(srcType->isSignedInteger()?Mnemonic_MOVSX:Mnemonic_MOVZX, 1, dstOpnd, srcOpnd));
 #else
             appendInsts(irManager.newI8PseudoInst(srcType->isSignedInteger()?Mnemonic_MOVSX:Mnemonic_MOVZX, 1, dstOpnd, srcOpnd));
@@ -602,14 +602,14 @@ CG_OpndHandle* InstCodeSelector::convToI
             sizeType=isSigned?typeManager.getInt16Type():typeManager.getUInt16Type();
             break;
 
-#ifdef _IA32_
+#ifdef HYX86
         case ConvertToIntOp::I:
 #endif
         case ConvertToIntOp::I4:
             sizeType=isSigned?typeManager.getInt32Type():typeManager.getUInt32Type();
             break;
 
-#ifdef _EM64T_
+#ifdef HYX86_64
         case ConvertToIntOp::I:
 #endif
         case ConvertToIntOp::I8:
@@ -670,7 +670,7 @@ Opnd * InstCodeSelector::simpleOp_I8(Mne
         case Mnemonic_OR:
         case Mnemonic_XOR:
         case Mnemonic_NOT:
-#ifndef _EM64T_
+#ifndef HYX86_64
             appendInsts(irManager.newI8PseudoInst(mn, 1, dst, src1, src2));
 #else
             appendInsts(irManager.newInstEx(mn, 1, dst, src1, src2));
@@ -816,7 +816,7 @@ CG_OpndHandle* InstCodeSelector::mul(Ari
             srcOpnd1=(Opnd*)convert(src1, dstType);
             srcOpnd2=(Opnd*)convert(src2, dstType);
             swapIfLastIs(srcOpnd1, srcOpnd2);
-#ifndef _EM64T_
+#ifndef HYX86_64
             appendInsts(irManager.newI8PseudoInst(Mnemonic_IMUL,1,dst,srcOpnd1,srcOpnd2));
 #else
             appendInsts(irManager.newInstEx(Mnemonic_IMUL,1,dst,srcOpnd1,srcOpnd2));
@@ -872,7 +872,7 @@ Opnd * InstCodeSelector::divOp(DivOp::Ty
             srcOpnd1=(Opnd*)convert(src1, dstType);
             srcOpnd2=(Opnd*)convert(src2, dstType);
 
-#ifndef _EM64T_
+#ifndef HYX86_64
             //
             // NOTE: as we don't have IREM mnemonic, then generate I8Inst 
             // with IDIV mnemonic. The 4th fake non-zero argument means 
@@ -971,7 +971,7 @@ CG_OpndHandle* InstCodeSelector::neg(Neg
             Type * dstType=irManager.getTypeFromTag(Type::Int64);
             Opnd * dstMOV = irManager.newOpnd(dstType);
             Opnd * src_null = irManager.newImmOpnd(dstType, 0);
-#ifndef _EM64T_
+#ifndef HYX86_64
             appendInsts(irManager.newI8PseudoInst(Mnemonic_MOV,1,dstMOV,src_null));
 #else
             appendInsts(irManager.newInstEx(Mnemonic_MOV,1,dstMOV,src_null));
@@ -1187,7 +1187,7 @@ Opnd * InstCodeSelector::shiftOp(Integer
         case IntegerOp::I8:
             dstType=irManager.getTypeFromTag(Type::Int64);
             dst=irManager.newOpnd(dstType);
-#ifndef _EM64T_
+#ifndef HYX86_64
             appendInsts(irManager.newI8PseudoInst(mn,1,dst,(Opnd*)convert(value, dstType),(Opnd*)convert(shiftAmount, typeManager.getInt32Type())));
 #else
             appendInsts(irManager.newInstEx(mn,1,dst,(Opnd*)convert(value, dstType),(Opnd*)convert(shiftAmount, typeManager.getInt32Type())));
@@ -1336,7 +1336,7 @@ bool InstCodeSelector::cmpToEflags(Compa
     bool swapped=false;
     switch(opType){
         case CompareOp::I4:
-#ifndef _EM64T_
+#ifndef HYX86_64
         case CompareOp::I:
         case CompareOp::Ref:
 #endif
@@ -1352,7 +1352,7 @@ bool InstCodeSelector::cmpToEflags(Compa
             }
             break;
         }
-#ifdef _EM64T_
+#ifdef HYX86_64
         case CompareOp::I:
         case CompareOp::Ref:
 #endif
@@ -1366,7 +1366,7 @@ bool InstCodeSelector::cmpToEflags(Compa
                 srcOpnd2=(Opnd*)convert(src2, srcType);
             }
             swapped=swapIfLastIs(srcOpnd1, srcOpnd2);
-#ifndef _EM64T_
+#ifndef HYX86_64
             Opnd * dst = irManager.getRegOpnd(RegName_EFLAGS);
             appendInsts(irManager.newI8PseudoInst(Mnemonic_CMP,1,dst,srcOpnd1,srcOpnd2));
 #else
@@ -1380,7 +1380,7 @@ bool InstCodeSelector::cmpToEflags(Compa
         {
             Type * srcType=irManager.getTypeFromTag(Type::Double);
             Opnd * srcOpnd1=(Opnd*)convert(src1, srcType);
-#ifdef _EM64T_
+#ifdef HYX86_64
             Opnd * baseOpnd = irManager.newOpnd(typeManager.getUnmanagedPtrType(srcType));
             Opnd * srcOpnd2=src2?(Opnd*)convert(src2, srcType):irManager.newFPConstantMemOpnd((double)0.0, baseOpnd, (BasicBlock*)currentBasicBlock);
 #else
@@ -1393,7 +1393,7 @@ bool InstCodeSelector::cmpToEflags(Compa
         {
             Type * srcType=irManager.getTypeFromTag(Type::Single);
             Opnd * srcOpnd1=(Opnd*)convert(src1, srcType);
-#ifdef _EM64T_
+#ifdef HYX86_64
             Opnd * baseOpnd = irManager.newOpnd(typeManager.getUnmanagedPtrType(srcType));
             Opnd * srcOpnd2=src2?(Opnd*)convert(src2, srcType):irManager.newFPConstantMemOpnd((float)0.0, baseOpnd, (BasicBlock*)currentBasicBlock);
 #else
@@ -1442,7 +1442,7 @@ InstCodeSelector::zeroForComparison(Opnd
 
 Opnd*
 InstCodeSelector::heapBaseOpnd(Type* type, POINTER_SIZE_INT heapBase) {
-#ifndef _EM64T_
+#ifndef HYX86_64
     assert(0); // not supposed to be used on ia32
 #endif
     Opnd* heapBaseOpnd = NULL;
@@ -1495,7 +1495,7 @@ void InstCodeSelector::tableSwitch(CG_Op
 
 void InstCodeSelector::genSwitchDispatch(U_32 numTargets, Opnd *switchSrc)
 {
-#ifdef _EM64T_
+#ifdef HYX86_64
     Opnd * opnd = irManager.newOpnd(typeManager.getUInt64Type());
     copyOpnd(opnd, switchSrc);
     appendInsts(irManager.newSwitchInst(numTargets, opnd));
@@ -1524,7 +1524,7 @@ void InstCodeSelector::throwException(CG
 
 void InstCodeSelector::throwSystemException(CompilationInterface::SystemExceptionId id) 
 {
-#ifdef _EM64T_
+#ifdef HYX86_64
     bool lazy = false;
 #else
     bool lazy = true;
@@ -1612,7 +1612,7 @@ CG_OpndHandle*    InstCodeSelector::ldc_
 
 CG_OpndHandle*    InstCodeSelector::ldc_i8(int64 val) 
 { 
-#ifndef _EM64T_ 
+#ifndef HYX86_64 
     return irManager.newImmOpnd(typeManager.getInt64Type(), val);
 #else
     Opnd * tmp = irManager.newOpnd(typeManager.getInt64Type());
@@ -1626,7 +1626,7 @@ CG_OpndHandle*    InstCodeSelector::ldc_
 
 CG_OpndHandle* InstCodeSelector::getVTableAddr(Type *       dstType, ObjectType * base) 
 {
-#ifndef _EM64T_
+#ifndef HYX86_64
     return irManager.newImmOpnd(dstType, Opnd::RuntimeInfo::Kind_VTableConstantAddr, base);
 #else
     Opnd * acc = irManager.newOpnd(dstType);
@@ -1653,7 +1653,7 @@ CG_OpndHandle* InstCodeSelector::getClas
 
 CG_OpndHandle* InstCodeSelector::ldc_s(float val) 
 {
-#ifndef _EM64T_
+#ifndef HYX86_64
     return irManager.newFPConstantMemOpnd(val);
 #else
     Opnd * baseOpnd = irManager.newOpnd(typeManager.getUnmanagedPtrType(typeManager.getSingleType()));
@@ -1668,7 +1668,7 @@ CG_OpndHandle* InstCodeSelector::ldc_s(f
 
 CG_OpndHandle*    InstCodeSelector::ldc_d(double val) 
 {
-#ifndef _EM64T_
+#ifndef HYX86_64
     return irManager.newFPConstantMemOpnd(val);
 #else
     Opnd * baseOpnd = irManager.newOpnd(typeManager.getUnmanagedPtrType(typeManager.getDoubleType()));
@@ -1929,7 +1929,7 @@ CG_OpndHandle * InstCodeSelector::addOff
     assert(offsetOpnd->getType()->isInteger());
     assert(fieldRefType->isManagedPtr());
 
-#ifdef _EM64T_
+#ifdef HYX86_64
     return simpleOp_I8(Mnemonic_ADD, fieldRefType, (Opnd*)base, offsetOpnd);
 #else
     return simpleOp_I4(Mnemonic_ADD, fieldRefType, (Opnd*)base, offsetOpnd);
@@ -1953,7 +1953,7 @@ CG_OpndHandle* InstCodeSelector::ldField
                                                 FieldDesc *    fieldDesc) 
 {
     Opnd * offsetOpnd=(Opnd*)ldFieldOffset(fieldDesc);
-#ifdef _EM64T_
+#ifdef HYX86_64
     return simpleOp_I8(Mnemonic_ADD, fieldRefType, (Opnd*)base, offsetOpnd);
 #else
     return simpleOp_I4(Mnemonic_ADD, fieldRefType, (Opnd*)base, offsetOpnd);
@@ -1965,7 +1965,7 @@ CG_OpndHandle* InstCodeSelector::ldField
 
 CG_OpndHandle*    InstCodeSelector::ldStaticAddr(Type* fieldRefType, FieldDesc *fieldDesc) 
 {
-#ifndef _EM64T_
+#ifndef HYX86_64
     Opnd * addr=irManager.newImmOpnd(fieldRefType, Opnd::RuntimeInfo::Kind_StaticFieldAddress, fieldDesc);
 #else
     Opnd* immOp = irManager.newImmOpnd(fieldRefType, Opnd::RuntimeInfo::Kind_StaticFieldAddress, fieldDesc);
@@ -1982,7 +1982,7 @@ CG_OpndHandle*  InstCodeSelector::ldElem
 {
     ArrayType * arrayType=((Opnd*)array)->getType()->asArrayType();
     Type * elemType=arrayType->getElementType();
-#ifdef _EM64T_
+#ifdef HYX86_64
     if (elemType->isReference()
         && Type::isCompressedReference(elemType->tag, compilationInterface) 
         && !elemType->isCompressedReference()) {
@@ -2011,7 +2011,7 @@ CG_OpndHandle*  InstCodeSelector::addEle
     Type * elemType=arrayType->getElementType();
     Type * dstType=irManager.getManagedPtrType(elemType);
 
-#ifdef _EM64T_
+#ifdef HYX86_64
     Type * indexType = typeManager.getInt64Type();
     Type * offType = typeManager.getInt64Type();
 #else
@@ -2068,7 +2068,7 @@ CG_OpndHandle*  InstCodeSelector::addEle
     U_32 elemSize=getByteSize(irManager.getTypeSize(elemType));
 
     Type * indexType = 
-#ifdef _EM64T_
+#ifdef HYX86_64
         typeManager.getInt64Type();
 #else
         typeManager.getInt32Type();
@@ -2116,7 +2116,7 @@ CG_OpndHandle* InstCodeSelector::simpleL
                                                 Opnd * baseTau,
                                                 Opnd * offsetTau) 
 {
-#ifdef _EM64T_
+#ifdef HYX86_64
     if(irManager.refsAreCompressed() && memType > Type::Float && memType!=Type::UnmanagedPtr) {
         Opnd * opnd = irManager.newMemOpndAutoKind(typeManager.getInt32Type(), addr);
         Opnd * dst = irManager.newOpnd(typeManager.getInt64Type());
@@ -2148,7 +2148,7 @@ void InstCodeSelector::simpleStInd(Opnd 
                                       Opnd * baseTau,
                                       Opnd * offsetAndTypeTau) 
 {
-#ifdef _EM64T_
+#ifdef HYX86_64
     // unmanaged pointers are never being compressed
     // Actually, there is only one possible case caused by magics:
     // unmanaged pointer to Int8
@@ -2397,7 +2397,7 @@ CG_OpndHandle* InstCodeSelector::ldRef(T
     if (codeSelector.getFlags().slowLdString || dstType->isSystemClass() ||
         *((POINTER_SIZE_INT *) compilationInterface.getStringInternAddr(enclosingMethod, refToken)) == 0) {
         NamedType * parentType=enclosingMethod->getParentType();
-    #ifdef _EM64T_
+    #ifdef HYX86_64
         Opnd * tp = irManager.getRegOpnd(RegName_RDI);
         appendInsts(irManager.newCopyPseudoInst(Mnemonic_MOV, tp,irManager.newImmOpnd(getRuntimeIdType(), Opnd::RuntimeInfo::Kind_TypeRuntimeId, parentType)));
         Opnd * st = irManager.getRegOpnd(RegName_RSI);
@@ -2440,7 +2440,7 @@ CG_OpndHandle* InstCodeSelector::ldRef(T
                                                  ptr, NULL, NULL, NULL); 
             retOpnd = simpleOp_I8(Mnemonic_ADD, memOpnd->getType(), memOpnd, base);
         } else {
-#ifdef _EM64T_ // in uncompressed mode the ptr can be greater than MAX_INT32 so it can not be an immediate
+#ifdef HYX86_64 // in uncompressed mode the ptr can be greater than MAX_INT32 so it can not be an immediate
             Opnd * tmp = irManager.newImmOpnd(irManager.getTypeFromTag(Type::UInt64),
                                               Opnd::RuntimeInfo::Kind_StringAddress,
                                               enclosingMethod, (void*)(POINTER_SIZE_INT)refToken);
@@ -2558,7 +2558,7 @@ CG_OpndHandle* InstCodeSelector::tau_ldV
                                                   MethodDesc*      methodDesc,
                                                   CG_OpndHandle *  tauVtableHasDesc) 
 {
-#ifdef _EM64T_
+#ifdef HYX86_64
     Opnd * offsetOpnd=irManager.newImmOpnd(typeManager.getIntPtrType(), Opnd::RuntimeInfo::Kind_MethodVtableSlotOffset, methodDesc);
     Opnd * acc = irManager.newOpnd(dstType);
     copyOpnd(acc, (Opnd*)vtableAddr);
@@ -2576,7 +2576,7 @@ CG_OpndHandle* InstCodeSelector::tau_ldV
                                                      CG_OpndHandle* base,
                                                      CG_OpndHandle *tauBaseNonNull) 
 {
-#ifndef _EM64T_
+#ifndef HYX86_64
     Opnd * vtableAddr=irManager.newOpnd(dstType);
     Opnd * sourceVTableAddr=irManager.newMemOpnd(dstType, (Opnd*)base, 0, 0, 
             irManager.newImmOpnd(typeManager.getInt32Type(), Opnd::RuntimeInfo::Kind_VTableAddrOffset)
@@ -2812,7 +2812,7 @@ CG_OpndHandle* InstCodeSelector::callhel
         Opnd** opnds = (Opnd**)args;
 
         //deal with constraints       
-#ifdef _EM64T_
+#ifdef HYX86_64
         Type* opnd1Type = opnds[1]->getType();
         assert(irManager.getTypeSize(opnd1Type)==OpndSize_32 || irManager.getTypeSize(opnd1Type)==OpndSize_64);
         assert(irManager.getTypeSize(opnds[1]->getType())==irManager.getTypeSize(opnds[2]->getType()));
@@ -3215,7 +3215,7 @@ CG_OpndHandle* InstCodeSelector::tau_ins
                                                  CG_OpndHandle* obj,
                                                  CG_OpndHandle* tauCheckedNull) 
 {
-#ifdef _EM64T_
+#ifdef HYX86_64
     Opnd * dst=irManager.newOpnd(typeManager.getInt64Type());
 #else
     Opnd * dst=irManager.newOpnd(typeManager.getInt32Type());

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InstCodeSelector.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InstCodeSelector.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InstCodeSelector.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InstCodeSelector.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Intel, Vyacheslav P. Shakin
  */
 
-#ifndef _IA32_INST_SELECTOR_H
-#define _IA32_INST_SELECTOR_H
+#ifndef HYX86INST_SELECTOR_H
+#define HYX86INST_SELECTOR_H
 
 #include "CodeGenIntfc.h"
 #include "Ia32CodeSelector.h"
@@ -454,4 +454,4 @@ private: 
 
 }}; // namespace Ia32
 
-#endif // _IA32_INST_SELECTOR_h
+#endif // HYX86INST_SELECTOR_h

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InternalProfiler.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InternalProfiler.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InternalProfiler.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InternalProfiler.cpp Tue Jun 22 21:43:55 2010
@@ -651,7 +651,7 @@ void InternalProfiler::addCounters(Metho
             ms->bbStats[node->getId()].bbExecCount= new(mm) int64[1];
             *(ms->bbStats[node->getId()].bbExecCount)   = 0;
             node->prependInst(irManager->newInst(Mnemonic_POPFD));
-#ifndef _EM64T_
+#ifndef HYX86_64
             node->prependInst(irManager->newInst(Mnemonic_ADC, irManager->newMemOpnd(irManager->getTypeFromTag(Type::Int32), MemOpndKind_Heap, NULL, int((U_8*)(ms->bbStats[node->getId()].bbExecCount) + 4)), irManager->newImmOpnd(irManager->getTypeFromTag(Type::Int32),0)));
 
             node->prependInst(irManager->newInst(Mnemonic_ADD, irManager->newMemOpnd(irManager->getTypeFromTag(Type::Int32), MemOpndKind_Heap, NULL, int(ms->bbStats[node->getId()].bbExecCount)), irManager->newImmOpnd(irManager->getTypeFromTag(Type::Int32),1)));
@@ -659,7 +659,7 @@ void InternalProfiler::addCounters(Metho
             node->prependInst(irManager->newInst(Mnemonic_PUSHFD));
         }
     }
-#ifndef _EM64T_
+#ifndef HYX86_64
     ((BasicBlock *)irManager->getFlowGraph()->getEntryNode())->prependInst(irManager->newInst(Mnemonic_ADD, irManager->newMemOpnd(irManager->getTypeFromTag(Type::Int32), MemOpndKind_Heap, NULL, int(ms->bbStats[-1].bbExecCount)), irManager->newImmOpnd(irManager->getTypeFromTag(Type::Int32),1)));
 #endif
 

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InternalTrace.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InternalTrace.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InternalTrace.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InternalTrace.cpp Tue Jun 22 21:43:55 2010
@@ -52,7 +52,7 @@ void __stdcall methodEntry(const char * 
 {
 
     JitFrameContext context;
-#ifdef _EM64T_
+#ifdef HYX86_64
     context.rsp=(POINTER_SIZE_INT)(&methodName+sizeof(POINTER_SIZE_INT)); // must point to the beginning of incoming stack args
 #else
     context.esp=(POINTER_SIZE_INT)(&methodName+sizeof(POINTER_SIZE_INT)); // must point to the beginning of incoming stack args
@@ -72,7 +72,7 @@ void __stdcall methodEntry(const char * 
         U_8 arg[4*sizeof(U_32)]; 
         for (U_32 j=0; j<info.slotCount; j++){
             if (!info.isReg){
-#ifdef _EM64T_
+#ifdef HYX86_64
                 *(POINTER_SIZE_INT*)(arg+cb)=((POINTER_SIZE_INT*)context.rsp)[info.slots[j]];
 #else
                 *(U_32*)(arg+cb)=((U_32*)context.esp)[info.slots[j]];

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InternalTrace.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InternalTrace.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InternalTrace.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32InternalTrace.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Vyacheslav P. Shakin
  */
 
-#ifndef _IA32_INTERNAL_TRACE_H_
-#define _IA32_INTERNAL_TRACE_H_
+#ifndef HYX86INTERNAL_TRACE_H_
+#define HYX86INTERNAL_TRACE_H_
 
 #include "Ia32IRManager.h"
 namespace Jitrino

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Printer.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Printer.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Printer.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Printer.cpp Tue Jun 22 21:43:55 2010
@@ -1413,7 +1413,7 @@ void printRuntimeArgs(::std::ostream& os
         U_8 arg[4*sizeof(U_32)]; 
         for (U_32 j=0; j<info.slotCount; j++){
             if (!info.isReg){
-#ifdef _EM64T_
+#ifdef HYX86_64
                 *(POINTER_SIZE_INT*)(arg+cb)=((POINTER_SIZE_INT*)context->rsp)[info.slots[j]];
 #else
                 *(U_32*)(arg+cb)=((U_32*)context->esp)[info.slots[j]];

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Printer.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Printer.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Printer.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Printer.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Vyacheslav P. Shakin
  */
 
-#ifndef _IA32_PRINTER_H_
-#define _IA32_PRINTER_H_
+#ifndef HYX86PRINTER_H_
+#define HYX86PRINTER_H_
 
 #include "open/types.h"
 #include "Stl.h"

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32RegAlloc2.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32RegAlloc2.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32RegAlloc2.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32RegAlloc2.cpp Tue Jun 22 21:43:55 2010
@@ -337,7 +337,7 @@ void RegAlloc2::runImpl()
     assert(parameters);
     if (strcmp(parameters, "ALL_GP") == 0)
 
-#ifdef _EM64T_
+#ifdef HYX86_64
         constrs = Constraint(RegName_R8)
                  |Constraint(RegName_RAX)
                  |Constraint(RegName_RDX)

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32RegAlloc3.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32RegAlloc3.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32RegAlloc3.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32RegAlloc3.cpp Tue Jun 22 21:43:55 2010
@@ -375,7 +375,7 @@ void RegAlloc3::Registers::parse (const 
 {
     if (params == 0 || strcmp(params, "ALL") == 0)
     {
-#ifdef _EM64T_
+#ifdef HYX86_64
         push_back(Constraint(RegName_RAX)
                  |Constraint(RegName_RCX)
                  |Constraint(RegName_RDX)
@@ -1234,7 +1234,7 @@ bool RegAlloc3::assignRegs ()
 }
 
 RegAlloc3::RegMask RegAlloc3::occupiedReg (OpndSize tgtSize, OpndSize adjSize, RegAlloc3::RegMask adjMask) {
-#if !defined(_EM64T_)    
+#if !defined(HYX86_64)    
     if (!((tgtSize != adjSize) && ((tgtSize == OpndSize_8) || (adjSize == OpndSize_8))))
 #endif
         return adjMask;

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32SpillGen.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32SpillGen.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32SpillGen.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32SpillGen.cpp Tue Jun 22 21:43:55 2010
@@ -358,7 +358,7 @@ void SpillGen::Registers::parse (const c
     if (params == 0 || strcmp(params, "ALL") == 0)
     {
 
-#ifdef _EM64T_
+#ifdef HYX86_64
         push_back(Constraint(RegName_R8)
                  |Constraint(RegName_RAX)
                  |Constraint(RegName_RCX)

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32StackInfo.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32StackInfo.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32StackInfo.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32StackInfo.cpp Tue Jun 22 21:43:55 2010
@@ -208,7 +208,7 @@ void StackInfo::unwind(MethodDesc* pMeth
    
 
     POINTER_SIZE_INT offset_step = sizeof(POINTER_SIZE_INT);
-#ifdef _EM64T_
+#ifdef HYX86_64
     if (itraceMethodExitString!=NULL){
         Log::cat_rt()->out()<<"__UNWIND__:"
             <<(itraceMethodExitString!=(const char*)1?itraceMethodExitString:"")
@@ -301,7 +301,7 @@ POINTER_SIZE_INT* StackInfo::getRegOffse
         //return register offset for previous stack frame. 
         //MUST be called before unwind()
         switch(reg) {
-#ifdef _EM64T_
+#ifdef HYX86_64
             case RegName_R15:
                 return context->p_r15;
             case RegName_R14:
@@ -343,7 +343,7 @@ POINTER_SIZE_INT* StackInfo::getRegOffse
 
 void StackInfo::fixHandlerContext(JitFrameContext* context)
 {
-#ifdef _EM64T_
+#ifdef HYX86_64
     if (itraceMethodExitString!=NULL){
         Log::cat_rt()->out()<<"__CATCH_HANDLER__:"
             <<(itraceMethodExitString!=(const char*)1?itraceMethodExitString:"")
@@ -366,7 +366,7 @@ void StackInfo::registerInsts(IRManager&
 {
     MethodDesc& md = irm.getMethodDesc();
     if (!md.isStatic()) {
-#ifdef _EM64T_
+#ifdef HYX86_64
         if ((md.isSynchronized() || md.isParentClassIsLikelyExceptionType())) {
             EntryPointPseudoInst * entryPointInst = irm.getEntryPointInst();
             offsetOfThis = (U_32)entryPointInst->thisOpnd->getMemOpndSubOpnd(MemOpndSubOpndKind_Displacement)->getImmValue();

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32StackInfo.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32StackInfo.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32StackInfo.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32StackInfo.h Tue Jun 22 21:43:55 2010
@@ -18,8 +18,8 @@
  * @author Intel, Nikolay A. Sidelnikov
  */
 
-#ifndef _IA32_STACK_INFO_H_
-#define _IA32_STACK_INFO_H_
+#ifndef HYX86STACK_INFO_H_
+#define HYX86STACK_INFO_H_
 
 #include "CodeGenIntfc.h"
 #include "MemoryManager.h"
@@ -214,4 +214,4 @@ private:
 };
 
 }}//namespace
-#endif /* _IA32_STACK_INFO_H_ */
+#endif /* HYX86STACK_INFO_H_ */

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32StackLayout.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32StackLayout.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32StackLayout.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32StackLayout.cpp Tue Jun 22 21:43:55 2010
@@ -209,7 +209,7 @@ static bool hasSOEHandlers(IRManager& ir
 #define MAX_STACK_FOR_SOE_HANDLERS 0x2000
 
 static void insertSOECheck(IRManager& irm, U_32 maxStackUsedByMethod) {
-#ifdef _EM64T_
+#ifdef HYX86_64
     //SOE checking is not finished on EM64T
     //TODO: work on stack alignment & SOE checkers
     if (true) return; 
@@ -327,7 +327,7 @@ void StackLayouter::createProlog()
     Inst * lastPush = NULL;
     
     // Push callee-save registers onto stack.
-#ifdef _EM64T_
+#ifdef HYX86_64
     for (U_32 reg = RegName_R15; reg >= RegName_RAX; reg--) {
 #else
     for (U_32 reg = RegName_EDI; reg >= RegName_EAX; reg--) {
@@ -421,7 +421,7 @@ void StackLayouter::createEpilog()
                 Inst* newIns = irManager->newInst(Mnemonic_ADD, irManager->getRegOpnd(STACK_REG), irManager->newImmOpnd(irManager->getTypeManager().getInt32Type(), localEnd - localBase));
                 newIns->insertBefore(retInst);
             }
-#ifdef _EM64T_
+#ifdef HYX86_64
             for (U_32 reg = RegName_R15; reg >= RegName_RAX ; reg--) {//pop callee-save registers
 #else
             for (U_32 reg = RegName_EDI; reg >= RegName_EAX ; reg--) {//pop callee-save registers

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Tls.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Tls.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Tls.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Tls.cpp Tue Jun 22 21:43:55 2010
@@ -48,7 +48,7 @@ Opnd* createTlsBaseLoadSequence(IRManage
 Opnd* createTlsBaseLoadSequence(IRManager& irManager, Node* ctrlNode, Type* tlsBaseType)
 {
     Opnd* tlsBase;
-#if defined(_WIN32) && defined(_EM64T_)
+#if defined(_WIN32) && defined(HYX86_64)
     // Currently do it in a looong way - via the helper, but need to change
     // it to FS:[0x14] - TODO
     tlsBase = createTlsBaseLoadGeneric(irManager, ctrlNode, tlsBaseType);
@@ -104,7 +104,7 @@ Opnd* createTlsBaseLoadLin(IRManager& ir
 
     int threadOffset = VMInterface::getTLSBaseOffset();
     Opnd* pTib;
-#if defined(_EM64T_)
+#if defined(HYX86_64)
     pTib = irManager.newMemOpnd(tlsBaseType, MemOpndKind_Any, NULL, 0, RegName_FS);
 #else
     pTib = irManager.newMemOpnd(tlsBaseType, MemOpndKind_Any, NULL, 0, RegName_GS);

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Tls.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Tls.h?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Tls.h (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/Ia32Tls.h Tue Jun 22 21:43:55 2010
@@ -24,8 +24,8 @@
   */
 
 
-#ifndef _IA32_TLS_H_
-#define _IA32_TLS_H_
+#ifndef HYX86TLS_H_
+#define HYX86TLS_H_
 
 #include "Ia32IRManager.h"
 
@@ -54,5 +54,5 @@ Opnd* createTlsBaseLoadSequence(IRManage
 
 }}; // ~Jitrino::Ia32
 
-#endif  // ifdef _IA32_TLS_H_
+#endif  // ifdef HYX86TLS_H_
 

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/RuntimeInterface_arch.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/RuntimeInterface_arch.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/RuntimeInterface_arch.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/shared/x86/codegenerator/RuntimeInterface_arch.cpp Tue Jun 22 21:43:55 2010
@@ -30,7 +30,7 @@ namespace Ia32{
 
 void RuntimeInterface::unwindStack(MethodDesc* methodDesc, JitFrameContext* context, bool isFirst) {
     StackInfo stackInfo;
-#ifdef _EM64T_
+#ifdef HYX86_64
     stackInfo.read(methodDesc, *context->p_rip, isFirst);
 #else
     stackInfo.read(methodDesc, *context->p_eip, isFirst);
@@ -39,7 +39,7 @@ void RuntimeInterface::unwindStack(Metho
 }
 
 bool RuntimeInterface::isSOEArea(MethodDesc* methodDesc, const ::JitFrameContext* context, bool isFirst) {
-#ifdef _EM64T_
+#ifdef HYX86_64
     POINTER_SIZE_INT eip = *context->p_rip;
 #else
     POINTER_SIZE_INT eip = *context->p_eip;
@@ -60,7 +60,7 @@ void* RuntimeInterface::getAddressOfThis
     }
     assert(context);
     StackInfo stackInfo;
-#ifdef _EM64T_
+#ifdef HYX86_64
     stackInfo.read(methodDesc, *context->p_rip, isFirst);
     assert(isFirst || (POINTER_SIZE_INT)context->p_rip+8 == context->rsp);
     return (void *)(context->rsp + stackInfo.getStackDepth() + (int)stackInfo.getOffsetOfThis());
@@ -75,7 +75,7 @@ void* RuntimeInterface::getAddressOfThis
 void  RuntimeInterface::fixHandlerContext(MethodDesc* methodDesc, JitFrameContext* context, bool isFirst)
 {
     StackInfo stackInfo;
-#ifdef _EM64T_
+#ifdef HYX86_64
     stackInfo.read(methodDesc, *context->p_rip, isFirst);
 #else
     stackInfo.read(methodDesc, *context->p_eip, isFirst);

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/unix/makefile
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/unix/makefile?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/unix/makefile (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/jitrino/unix/makefile Tue Jun 22 21:43:55 2010
@@ -22,7 +22,7 @@ include $(HY_TARGET)/hdk/build/make/defi
 VM_HOME=../../../../../../../vm/
 
 DEFINES += \
-  -DREFS_USE_UNCOMPRESSED -D_IA32_ -DPLATFORM_POSIX \
+  -DREFS_USE_UNCOMPRESSED -DPLATFORM_POSIX \
   -D__SMP__ -DLINUX_TLS_OPT -D_LARGEFILE64_SOURCE \
   -DPROJECT_JITRINO
 

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port/unix/disasm/disasm.c
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port/unix/disasm/disasm.c?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port/unix/disasm/disasm.c (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port/unix/disasm/disasm.c Tue Jun 22 21:43:55 2010
@@ -30,7 +30,7 @@
 #include "port_disasm.h"
 
 // this is mostly imperical data 
-#if defined(_IA32_)
+#if defined(HYX86)
     #define ADDR_SIZE       16
     #define MNEMONIC_SIZE   15
     #define BYTES_PER_LINE  2
@@ -60,7 +60,7 @@ struct port_disassembler_t {
     apr_size_t num_bytes_used;
 };
 
-#if defined(_IA32_)
+#if defined(HYX86)
 
 /*    General printing routines    */
 
@@ -148,12 +148,12 @@ static void disasm_print(port_disassembl
 #endif
     }
 }
-#endif // defined(_IA32_)
+#endif // defined(HYX86)
 
 /*    Public Interface    */
 
 APR_DECLARE(apr_status_t) port_disasm_initialize() {
-#if defined(_IA32_)
+#if defined(HYX86)
     return APR_SUCCESS;
 #else
     return APR_ENOTIMPL;
@@ -162,7 +162,7 @@ APR_DECLARE(apr_status_t) port_disasm_in
 
 APR_DECLARE(apr_status_t) port_disassembler_create(port_disassembler_t ** disassembler,
                                                    apr_pool_t * pool) {
-#if defined(_IA32_)
+#if defined(HYX86)
     apr_status_t status;
     port_disasm_info_t info = {1, 0, 1};
     
@@ -193,7 +193,7 @@ APR_DECLARE(apr_status_t) port_disassemb
 APR_DECLARE(apr_status_t) port_disasm_set_info(port_disassembler_t * disassembler,
                                                const port_disasm_info_t new_info,
                                                port_disasm_info_t * old_info) {
-#if defined(_IA32_)
+#if defined(HYX86)
     if (old_info != NULL) {
         *old_info = disassembler->port_info;
     }
@@ -218,7 +218,7 @@ APR_DECLARE(apr_status_t) port_disasm(po
                                       const char * code, 
                                       unsigned int len,
                                       char ** disasm_code) {
-#if defined(_IA32_)    
+#if defined(HYX86)    
     // check if nothing should be printed
     if (disassembler->line_size == 0) {
         *disasm_code = NULL;
@@ -255,7 +255,7 @@ APR_DECLARE(apr_status_t) port_disasm_to
                                               const char * code,
                                               unsigned int len,
                                               apr_file_t * thefile) {
-#if defined(_IA32_)
+#if defined(HYX86)
     // check if nothing should be printed
     if (disassembler->line_size == 0) {
         return APR_SUCCESS;

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port/unix/makefile
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port/unix/makefile?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port/unix/makefile (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port/unix/makefile Tue Jun 22 21:43:55 2010
@@ -22,7 +22,7 @@ include $(HY_TARGET)/hdk/build/make/defi
 VM_HOME=../../../../../../../vm/
 
 DEFINES += \
-  -DREFS_USE_UNCOMPRESSED -D_IA32_ -DPLATFORM_POSIX \
+  -DREFS_USE_UNCOMPRESSED -DPLATFORM_POSIX \
   -D__SMP__ -DLINUX_TLS_OPT -D_LARGEFILE64_SOURCE \
   -DAPR_DECLARE_EXPORT -DBUILDING_VM
 

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port/unix/misc/sysinfo.c
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port/unix/misc/sysinfo.c?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port/unix/misc/sysinfo.c (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port/unix/misc/sysinfo.c Tue Jun 22 21:43:55 2010
@@ -50,7 +50,7 @@ APR_DECLARE(apr_status_t) port_OS_name_v
 APR_DECLARE(const char *) port_CPU_architecture(void){
 #if defined(_IPF_)
 	return "ia64";
-#elif defined (_EM64T_)
+#elif defined (HYX86_64)
     return "x86_64";
 #else
     return "x86";

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port_ch/unix/makefile
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port_ch/unix/makefile?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port_ch/unix/makefile (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port_ch/unix/makefile Tue Jun 22 21:43:55 2010
@@ -22,7 +22,7 @@ include $(HY_TARGET)/hdk/build/make/defi
 VM_HOME=../../../../../../../vm/
 
 DEFINES += \
-  -DREFS_USE_UNCOMPRESSED -D_IA32_ -DPLATFORM_POSIX \
+  -DREFS_USE_UNCOMPRESSED -DPLATFORM_POSIX \
   -D__SMP__ -DLINUX_TLS_OPT -D_LARGEFILE64_SOURCE \
   -DAPR_DECLARE_EXPORT -DBUILDING_VM
 

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port_ch/unix/thread/port_thread_tls_os.c
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port_ch/unix/thread/port_thread_tls_os.c?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port_ch/unix/thread/port_thread_tls_os.c (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/port_ch/unix/thread/port_thread_tls_os.c Tue Jun 22 21:43:55 2010
@@ -34,11 +34,11 @@ static pthread_mutex_t g_shared_data_mut
 static port_shared_data_t* g_port_shared_data = NULL;
 static port_shared_data_t g_port_shared_data_struct;
 
-#ifdef _EM64T_
+#ifdef HYX86_64
 #define MEM_PROTECT_SIZE 0x400
 #elif defined (_IPF_)
 #define MEM_PROTECT_SIZE 0
-#else /* _IA32_ */
+#else /* HYX86 */
 #define MEM_PROTECT_SIZE 0x100
 #endif
 

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/verifier/unix/makefile
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/verifier/unix/makefile?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/verifier/unix/makefile (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/verifier/unix/makefile Tue Jun 22 21:43:55 2010
@@ -22,7 +22,7 @@ include $(HY_TARGET)/hdk/build/make/defi
 VM_HOME=../../../../../../../vm/
 
 DEFINES += \
-  -DREFS_USE_UNCOMPRESSED -D_IA32_ -DPLATFORM_POSIX \
+  -DREFS_USE_UNCOMPRESSED -DPLATFORM_POSIX \
   -D__SMP__ -DLINUX_TLS_OPT -D_LARGEFILE64_SOURCE \
   -DBUILDING_VM
 

Modified: harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/vmcore/shared/class_support/Environment.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/vmcore/shared/class_support/Environment.cpp?rev=957042&r1=957041&r2=957042&view=diff
==============================================================================
--- harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/vmcore/shared/class_support/Environment.cpp (original)
+++ harmony/enhanced/java/branches/mrh/drlvm/modules/vm/src/main/native/vmcore/shared/class_support/Environment.cpp Tue Jun 22 21:43:55 2010
@@ -57,7 +57,7 @@ ready_for_exceptions(false)
 
     hythread_lib_create(&hythread_lib);
 
-#if defined _IPF_ || defined _EM64T_
+#if defined _IPF_ || defined HYX86_64
     compact_fields = true;
     sort_fields = true;
 #else // !_IPF_



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