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From "Xiaoming Gu (JIRA)" <j...@apache.org>
Subject [jira] Updated: (HARMONY-5965) [drlvm][jit]generate Mnemonic_LEA LIR for Op_Shladd HIR in IA32
Date Fri, 19 Sep 2008 11:20:44 GMT

     [ https://issues.apache.org/jira/browse/HARMONY-5965?page=com.atlassian.jira.plugin.system.issuetabpanels:all-tabpanel
]

Xiaoming Gu updated HARMONY-5965:
---------------------------------

    Attachment: H5965-V2.patch

In the available MUL strength reduction, X*10 is reduced to (X<<2+X) <<1+0 and
0 is generated by a self XOR instruction (CASE 3). Actually this XOR is not necessay and it's
eliminated in HIR2LIR pass in this improved patch. Following is the better instructions generated
with the improve patch. Comparing with CASE 3, you may find XOR gone.


CASE 4: MUL strength reduction - using LEA and taking care of 0

I22: LEA t48(EDI):I_32,t47[v434(EBP)+v434(EBP)*t46(4)]:I_32 bcOff: 42 \l\
I23: LEA t52(EDI):I_32,t51[t48(EDI)*t50(2)+t49(0)]:I_32 bcOff: 42 \l\
I861: MOV v533[v521(ESP)+t532(-24)]:I_32,t52(EDI):I_32 bcOff: 43 \l\
I860: MOV v535[v521(ESP)+t534(-28)]:I_32,t53(1):I_32 bcOff: 45 \l\
I26: EmptyPseudoInst bcOff: 48 \l\

                    CASE1      CASE2     CASE3      CASE4
Time (msec)   6234         7688          5734          5704
Normalized     1              1.233         0.920         0.915

We get more 0.5% improvement for the synthetic example.

> [drlvm][jit]generate Mnemonic_LEA LIR for Op_Shladd HIR in IA32
> ---------------------------------------------------------------
>
>                 Key: HARMONY-5965
>                 URL: https://issues.apache.org/jira/browse/HARMONY-5965
>             Project: Harmony
>          Issue Type: Improvement
>          Components: DRLVM
>            Reporter: Xiaoming Gu
>         Attachments: H5965-V1.patch, H5965-V2.patch
>
>
> In IA32 there is a quick (1 cycle) LEA instruction for loading effective address. The
function of LEA is a combination of shift-left and addition. For example LEA dst, src, 2,
4 does dst=src<<2+4. It's usually used but not limited in element address calculation
for array.
> In current Ia32InstCodeSelector.cpp, the function for translating Op_Shladd HIR generates
shl and add. Since LEA has the same semantic, we could deploy it to improve performance.

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