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From "Xiaoming Gu (JIRA)" <j...@apache.org>
Subject [jira] Closed: (HARMONY-5965) [drlvm][jit]generate Mnemonic_LEA LIR for Op_Shladd HIR in IA32
Date Mon, 22 Sep 2008 09:08:44 GMT

     [ https://issues.apache.org/jira/browse/HARMONY-5965?page=com.atlassian.jira.plugin.system.issuetabpanels:all-tabpanel

Xiaoming Gu closed HARMONY-5965.

    Resolution: Fixed

Merged to H5901.

> [drlvm][jit]generate Mnemonic_LEA LIR for Op_Shladd HIR in IA32
> ---------------------------------------------------------------
>                 Key: HARMONY-5965
>                 URL: https://issues.apache.org/jira/browse/HARMONY-5965
>             Project: Harmony
>          Issue Type: Improvement
>          Components: DRLVM
>            Reporter: Xiaoming Gu
>         Attachments: H5965-V1.patch, H5965-V2.patch
> In IA32 there is a quick (1 cycle) LEA instruction for loading effective address. The
function of LEA is a combination of shift-left and addition. For example LEA dst, src, 2,
4 does dst=src<<2+4. It's usually used but not limited in element address calculation
for array.
> In current Ia32InstCodeSelector.cpp, the function for translating Op_Shladd HIR generates
shl and add. Since LEA has the same semantic, we could deploy it to improve performance.

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