[ https://issues.apache.org/jira/browse/HARMONY-5022?page=com.atlassian.jira.plugin.system.issuetabpanels:all-tabpanel
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Mikhail Fursov reassigned HARMONY-5022:
---------------------------------------
Assignee: Mikhail Fursov
> [drlvm][jit][opt] incorrect codegeneration of compressed obj arithmetics
> ------------------------------------------------------------------------
>
> Key: HARMONY-5022
> URL: https://issues.apache.org/jira/browse/HARMONY-5022
> Project: Harmony
> Issue Type: Bug
> Components: DRLVM
> Environment: x86_64
> Reporter: Alexey Varlamov
> Assignee: Mikhail Fursov
>
> Codeselector of Jitrino.OPT always (except ldind) handles heap base as 64-bit immediate
operand for SUB/ADD/CMP instructions, while CPU only supports imm32 for these instruction
group:
> working_vm\vm\jitrino\src\codegenerator\ia32\Ia32InstCodeSelector.cpp(1305): zeroType,
op, irManager.newImmOpnd(op->getType(),(zeroType == CompareOp::Ref) || (zeroType == CompareOp::CompRef)
? (POINTER_SIZE_INT)VMInterface::getHeapBase() : 0));
> working_vm\vm\jitrino\src\codegenerator\ia32\Ia32InstCodeSelector.cpp(1324): zeroType,
op, irManager.newImmOpnd(op->getType(),(zeroType == CompareOp::Ref) || (zeroType == CompareOp::CompRef)
? (POINTER_SIZE_INT)VMInterface::getHeapBase() : 0));
> working_vm\vm\jitrino\src\codegenerator\ia32\Ia32InstCodeSelector.cpp(1479): return
irManager.newImmOpnd(typeManager.getNullObjectType(), (POINTER_SIZE_INT)VMInterface::getHeapBase());
> working_vm\vm\jitrino\src\codegenerator\ia32\Ia32InstCodeSelector.cpp(1939): Opnd
* heap_base = irManager.newImmOpnd(typeManager.getIntPtrType(), (POINTER_SIZE_INT)VMInterface::getHeapBase());
> working_vm\vm\jitrino\src\codegenerator\ia32\Ia32InstCodeSelector.cpp(2205): copyOpnd(base,
irManager.newImmOpnd(base->getType(), (POINTER_SIZE_INT)VMInterface::getHeapBase()));
> However encoder silently truncates such operands to 32 bit - that is separate issue,
I'll dig into it.
> In fact the heap base must be loaded to reg64 first.
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