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From gshiman...@apache.org
Subject svn commit: r605233 - in /harmony/enhanced/drlvm/trunk/vm/port/src/encoder/ia32_em64t: enc_defs.h enc_tabl.cpp
Date Tue, 18 Dec 2007 15:29:20 GMT
Author: gshimansky
Date: Tue Dec 18 07:29:18 2007
New Revision: 605233

URL: http://svn.apache.org/viewvc?rev=605233&view=rev
Log:
Applied patch from HARMONY-5321
[drlvm][NCAI][encoder] JVMTI disassembler does not understand CMC opcode and D0/D1 shift opcodes


Modified:
    harmony/enhanced/drlvm/trunk/vm/port/src/encoder/ia32_em64t/enc_defs.h
    harmony/enhanced/drlvm/trunk/vm/port/src/encoder/ia32_em64t/enc_tabl.cpp

Modified: harmony/enhanced/drlvm/trunk/vm/port/src/encoder/ia32_em64t/enc_defs.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/port/src/encoder/ia32_em64t/enc_defs.h?rev=605233&r1=605232&r2=605233&view=diff
==============================================================================
--- harmony/enhanced/drlvm/trunk/vm/port/src/encoder/ia32_em64t/enc_defs.h (original)
+++ harmony/enhanced/drlvm/trunk/vm/port/src/encoder/ia32_em64t/enc_defs.h Tue Dec 18 07:29:18
2007
@@ -413,6 +413,7 @@
 Mnemonic_BSR,                           // Bit scan reverse
 
 Mnemonic_CALL,                          // Call Procedure
+Mnemonic_CMC,                           // Complement Carry Flag
 Mnemonic_CWD, Mnemonic_CDQ=Mnemonic_CWD,// Convert Word to Doubleword/Convert Doubleword
to Qua T dword
 Mnemonic_CMOVcc,                        // Conditional Move
     CCM(CMOV,O),

Modified: harmony/enhanced/drlvm/trunk/vm/port/src/encoder/ia32_em64t/enc_tabl.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/port/src/encoder/ia32_em64t/enc_tabl.cpp?rev=605233&r1=605232&r2=605233&view=diff
==============================================================================
--- harmony/enhanced/drlvm/trunk/vm/port/src/encoder/ia32_em64t/enc_tabl.cpp (original)
+++ harmony/enhanced/drlvm/trunk/vm/port/src/encoder/ia32_em64t/enc_tabl.cpp Tue Dec 18 07:29:18
2007
@@ -474,6 +474,12 @@
 END_OPCODES()
 END_MNEMONIC()
 
+BEGIN_MNEMONIC(CMC, MF_USES_FLAGS|MF_AFFECTS_FLAGS, N)
+BEGIN_OPCODES()
+    {OpcodeInfo::decoder,     {0xF5},         {},     N },
+END_OPCODES()
+END_MNEMONIC()
+
 //TODO: Workaround. Actually, it's D_DU, but Jitrino's CG thinks it's D_U
 BEGIN_MNEMONIC(CDQ, MF_NONE, D_U )
 BEGIN_OPCODES()
@@ -1250,16 +1256,18 @@
 #define DEFINE_SHIFT_MNEMONIC(nam, slash_num, flags) \
 BEGIN_MNEMONIC(nam, flags, DU_U) \
 BEGIN_OPCODES()\
-/*  {OpcodeInfo::all,   {0xD0, slash_num},              {r_m8,  const_1},   DU_U },*/\
+    /* D0 & D1 opcodes are added w/o 2nd operand (1) because */\
+    /* they are used for decoding only so only instruction length is needed */\
+    {OpcodeInfo::decoder, {0xD0, slash_num},            {r_m8/*,const_1*/},   DU },\
     {OpcodeInfo::all,   {0xD2, slash_num},              {r_m8,  CL},        DU_U },\
     {OpcodeInfo::all,   {0xC0, slash_num, ib},          {r_m8,  imm8},      DU_U },\
 \
-/*  {OpcodeInfo::all,   {Size16, 0xD1, slash_num},      {r_m16, const_1},   DU_U },*/\
+    {OpcodeInfo::decoder, {Size16, 0xD1, slash_num},    {r_m16/*,const_1*/},  DU },\
     {OpcodeInfo::all,   {Size16, 0xD3, slash_num},      {r_m16, CL},        DU_U },\
     {OpcodeInfo::all,   {Size16, 0xC1, slash_num, ib},  {r_m16, imm8 },     DU_U },\
 \
-/*  {OpcodeInfo::all,   {0xD1, slash_num},              {r_m32, const_1},   DU_U },*/\
-/*  {OpcodeInfo::em64t, {REX_W, 0xD1, slash_num},       {r_m64, const_1},   DU_U },*/\
+    {OpcodeInfo::decoder,   {0xD1, slash_num},              {r_m32/*,const_1*/}, DU },\
+    {OpcodeInfo::decoder64, {REX_W, 0xD1, slash_num},       {r_m64/*,const_1*/}, DU },\
 \
     {OpcodeInfo::all,   {0xD3, slash_num},              {r_m32, CL},        DU_U },\
     {OpcodeInfo::em64t, {REX_W, 0xD3, slash_num},       {r_m64, CL},        DU_U },\



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