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From "Naumova Natalya (JIRA)" <j...@apache.org>
Subject [jira] Created: (HARMONY-4621) Stack misalignment when using SSE instructions
Date Sun, 12 Aug 2007 13:13:43 GMT
Stack misalignment when using SSE instructions
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                 Key: HARMONY-4621
                 URL: https://issues.apache.org/jira/browse/HARMONY-4621
             Project: Harmony
          Issue Type: Improvement
          Components: DRLVM
            Reporter: Naumova Natalya 


This issue is related with stack misalignment: data must be 16-bytes aligned when loading
and storing on 128bit xmm registers,  it increases the performance of SSE usage. Now we have
misalign local variables, and stack register (esp). Then we have a penalty from using xmm
registers. Can we do some optimization for better SSE using, e.g. 16-bytes allignment of esp
and all local variables? 

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