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From "weldon washburn (JIRA)" <j...@apache.org>
Subject [jira] Commented: (HARMONY-4716) Thread State Transitions Design
Date Fri, 31 Aug 2007 18:59:18 GMT

    [ https://issues.apache.org/jira/browse/HARMONY-4716?page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel#action_12524163

weldon washburn commented on HARMONY-4716:

The timing diagram (hopefully) captures the synchronization issues between a thread requesting
a suspension and a thread that is targetted for suspension.  The AAA_thread_suspend.cpp is
rough code for a proposed suspend enable/disable algorithm.  The tricky part is the performance.
 Initial tests show that doing a lock cmpxchg on thread suspend disable is a performance problem.
 An alternative approach to solving this performance problem is to use SFENCE instruction.
 Unfortunately the documentation on SFENCE is rather vague.  In other words, if SFENCE actually
forces all the contents of the HW store buffer to enter the coherency domain, this instruction
might be useable.  But the documentation seems to say SFENCE only guarantees write ordering.

> Thread State Transitions Design
> -------------------------------
>                 Key: HARMONY-4716
>                 URL: https://issues.apache.org/jira/browse/HARMONY-4716
>             Project: Harmony
>          Issue Type: Bug
>          Components: DRLVM
>            Reporter: weldon washburn
>            Assignee: weldon washburn
>         Attachments: AAA_thread_suspend.cpp, HarmonyJVM_Thread_State_Diagrams.ppt, thread_state_transition_list_form.doc
> This JIRA contains the documentation on a proposed approach to Thread State Transition
design.  These documents were already uploaded once before but somehow got lost in JIRA (?)

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