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From var...@apache.org
Subject svn commit: r518137 - in /harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32: Ia32CodeEmitter.cpp Ia32InstCodeSelector.cpp
Date Wed, 14 Mar 2007 13:41:55 GMT
Author: varlax
Date: Wed Mar 14 06:41:55 2007
New Revision: 518137

URL: http://svn.apache.org/viewvc?view=rev&rev=518137
Log:
Applied latest correction to HARMONY-3189 [drlvm][jit][opt] code patching works incorrectly
on EM64T

Modified:
    harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32CodeEmitter.cpp
    harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32InstCodeSelector.cpp

Modified: harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32CodeEmitter.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32CodeEmitter.cpp?view=diff&rev=518137&r1=518136&r2=518137
==============================================================================
--- harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32CodeEmitter.cpp (original)
+++ harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32CodeEmitter.cpp Wed
Mar 14 06:41:55 2007
@@ -595,6 +595,14 @@
   
 #ifdef _EM64T_
     if ( !fit32(offset) ) { // offset is not a signed value that fits into 32 bits
+        return true;
+        // this place should be rewritten to perform code patching safely:
+        // - there should be nops before call inst (sufficient for self jump and regiscter
call encodeing)
+        // - encode self jump before call inst
+        // - encode mov reg, newTarget (before)
+        // - replace old call by nops
+        // - replace self-jump by nops
+/*
         EncoderBase::Operands args;
         args.clear();
         args.add(RegName_R14);
@@ -604,6 +612,7 @@
         args.clear();
         args.add(RegName_R14);
         EncoderBase::encode(ip, Mnemonic_CALL, args);
+*/
     } else
 #endif
     { // offset fits into 32 bits

Modified: harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32InstCodeSelector.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32InstCodeSelector.cpp?view=diff&rev=518137&r1=518136&r2=518137
==============================================================================
--- harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32InstCodeSelector.cpp
(original)
+++ harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32InstCodeSelector.cpp
Wed Mar 14 06:41:55 2007
@@ -2642,7 +2642,12 @@
                                              CG_OpndHandle* tauTypesChecked,
                                              InlineInfo*       ii)
 {
-    Opnd * target=irManager.newImmOpnd(typeManager.getIntPtrType(), Opnd::RuntimeInfo::Kind_MethodDirectAddr,
desc);
+    // target address here has Int32 type. On EM64T platform it can be larger, but this situations
are managed
+    // in Ia32CodeEmitter::postPass method (transforming direct calls into register form
if target offset
+    // does not fit into 32 bits). If on EM64T we set IntPtrType for target address here
constraint resolver work makes all
+    // calls a register-form ones. (Even for those with a short offset). But immediate calls
are faster and takes
+    // less space. We should keep them when it is possible.
+    Opnd * target=irManager.newImmOpnd(typeManager.getInt32Type(), Opnd::RuntimeInfo::Kind_MethodDirectAddr,
desc);
     Opnd * retOpnd=createResultOpnd(retType);
     CallInst * callInst=irManager.newCallInst(target, irManager.getDefaultManagedCallingConvention(),

         numArgs, (Opnd **)args, retOpnd, ii);



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