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From "Ivashin Sergey (JIRA)" <j...@apache.org>
Subject [jira] Created: (HARMONY-2747) [drlvm][jit] Jitrino SpillGen improvements
Date Fri, 15 Dec 2006 13:42:21 GMT
[drlvm][jit] Jitrino SpillGen improvements

                 Key: HARMONY-2747
                 URL: http://issues.apache.org/jira/browse/HARMONY-2747
             Project: Harmony
          Issue Type: Improvement
          Components: DRLVM
            Reporter: Ivashin Sergey

In general, SpillGen cannot assign registers for all operands that require it. For all known
tests and benchmarks SpillGen assign registers successfully, but it is possible to generate
a control flow graph on which Spillgen will fail, i.e. will not assign register for instruction
which requires it. In fact, such programs are often generated by experimental versions of
IA32 codegen stages.

The proposed patch significantly reduces chances of SpillGen failures. It was tested and used
in experiments with IA32 codegen. Currently it is impossible to create a test for this patch
or demonstrate its effect.

The patch also contains some code cleanup (dead code removed).

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