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From jor...@apache.org
Subject cvs commit: apr/atomic/unix apr_atomic.c
Date Tue, 16 Dec 2003 10:57:17 GMT
jorton      2003/12/16 02:57:17

  Modified:    atomic/unix apr_atomic.c
  Log:
  Review of x86 asm, fixing intel_atomic_add32 with gcc 2.7.2.1 which
  doesn't allow the '+' constraint on an output operand.
  
  * apr_atomic.c (apr_atomic_cas32, apr_atomic_sub32):
  Condition code register is clobbered.
  (intel_atomic_add32): Use separate input operands rather than
  read/write output operands; clobber cc.
  (apr_atomic_dec32): Simplify by two instructions to output an 8-bit
  value; clobber cc.
  
  Submitted by: David Howells <dhowells@redhat.com>
  
  Revision  Changes    Path
  1.41      +10 -13    apr/atomic/unix/apr_atomic.c
  
  Index: apr_atomic.c
  ===================================================================
  RCS file: /home/cvs/apr/atomic/unix/apr_atomic.c,v
  retrieving revision 1.40
  retrieving revision 1.41
  diff -u -u -r1.40 -r1.41
  --- apr_atomic.c	15 Dec 2003 13:21:08 -0000	1.40
  +++ apr_atomic.c	16 Dec 2003 10:57:17 -0000	1.41
  @@ -99,7 +99,7 @@
       asm volatile ("lock; cmpxchgl %1, %2"             
                     : "=a" (prev)               
                     : "r" (with), "m" (*(mem)), "0"(cmp) 
  -                  : "memory");
  +                  : "memory", "cc");
       return prev;
   }
   #define APR_OVERRIDE_ATOMIC_CAS32
  @@ -108,10 +108,9 @@
                                                 apr_uint32_t val)
   {
       asm volatile ("lock; xaddl %0,%1"
  -                  : "+r"(val), "+m"(*mem) /* outputs and inputs */
  -                  :
  -                  : "memory");            /*XXX is this needed?  it knows that
  -                                                *mem is an output */
  +                  : "=r"(val), "=m"(*mem) /* outputs */
  +                  : "0"(val), "m"(*mem)   /* inputs */
  +                  : "memory", "cc");
       return val;
   }
   
  @@ -127,21 +126,19 @@
       asm volatile ("lock; subl %1, %0"
                     :
                     : "m" (*(mem)), "r" (val)
  -                  : "memory");
  +                  : "memory", "cc");
   }
   #define APR_OVERRIDE_ATOMIC_SUB32
   
   APR_DECLARE(int) apr_atomic_dec32(volatile apr_uint32_t *mem)
   {
  -    int prev;
  +    unsigned char prev;
   
  -    asm volatile ("mov $0, %%eax;\n\t"
  -                  "lock; decl %1;\n\t"
  -                  "setnz %%al;\n\t"
  -                  "mov %%eax, %0"
  -                  : "=r" (prev)
  +    asm volatile ("lock; decl %1;\n\t"
  +                  "setnz %%al"
  +                  : "=a" (prev)
                     : "m" (*(mem))
  -                  : "memory", "%eax");
  +                  : "memory", "cc");
       return prev;
   }
   #define APR_OVERRIDE_ATOMIC_DEC32
  
  
  

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